IP Library Granted Patent US 7,307,319
Granted Patent B1
US 7,307,319 · App. 10/837,086 · Granted Dec 11, 2007

High-voltage protection device and process

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Quick Facts
Patent No.
US 7,307,319
App. No.
10/837,086
Granted
Dec 11, 2007
Kind
B1
Abstract

A high-voltage circuit protection device includes a p-n junction in a semiconductor substrate that is spaced apart from a first electrode region by a diode region. A semiconductor layer overlies the diode region and is separated therefrom by a dielectric layer. A shallow-doped region resides in the diode region spaced apart from the p-n junction by a predetermined distance. The predetermined distance preferably ranges from about 0 to about 50% of the length of the diode region. A process for fabricating the high-voltage device includes forming the shallow-doped region using a threshold adjustment mask followed by formation of the first electrode region using the semiconductor layer in a self-aligned doping process. The shallow-doped region functions to reduce the clamping voltage of the device.

Claims (13)

1. A high-voltage protection device comprising:

a substrate having a well region therein;

first and second electrode regions in the well region and separated by the length of a diode region, the electrode regions being of opposite conductivity type;

a shallow-doped region in the diode region adjacent to the first electrode region and spaced apart from the second electrode region by a predetermined distance no more than about 50% of the diode region length, the shallow-doped region being of a same conductivity type as the first electrode region and shallower in depth than the electrode regions, wherein the shallow-doped region has a doping concentration lower than the doping concentration of the electrode regions; and;

a gate electrode overlying the diode region and shallow-doped region and separated therefrom by a dielectric layer.

2. The protection device of claim 1 including:

a third electrode region in the well region separated from the first electrode region by the length of a second diode region, the first and third electrode regions being of opposite conductivity type;

a second gate electrode overlying the second diode region and separated therefrom by a second dielectric layer; and

a second shallow-doped region in the second diode region adjacent to the first electrode region and spaced apart from the third electrode region by a predetermined distance, the shallow-doped region being of a same conductivity type as the third electrode region and shallower in depth than the first and third electrode regions.

3. The protection device of claim 1 including:

a third electrode region in the well region separated from the second electrode region by the length of a second diode region, the second and third electrode regions being of opposite conductivity type;

a second gate electrode overlying the second diode region and separated therefrom by a second dielectric layer; and

a second shallow-doped region in the second diode region adjacent to the third electrode region and spaced apart from the second electrode region by a predetermined distance, the shallow-doped region being of a same conductivity type as the third electrode region and shallower in depth than the second and third electrode regions.

Assignments (4)
SECURITY INTEREST Recorded May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
SECURITY INTEREST Recorded Mar 18, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035222/0866 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2004
From: CHONG, NUI; OMID-ZOHOOR, FARROKH
To: LATTICE SEMICONDUCTOR CORPORATION
Reel/Frame 015299/0096 →