Method of forming a super-junction semiconductor device
View Patent ↗In one embodiment, a transistor is formed to have alternating depletion and conduction regions that are formed by doping the depletion and conduction regions through an opening in a substrate of the transistor.
1. A method of forming a semiconductor device comprising:
providing a substrate of a first conductivity type;
forming a doped layer of the first conductivity type on at least a portion the substrate;
forming a first opening in the doped layer wherein the first opening has sidewalls;
doping a first region of the doped layer juxtaposed to at least a portion of the sidewalls of the first opening to form a first doped region along the sidewalls and extending into the doped layer leaving a first portion of the doped layer adjacent to the first doped region and distal from the first opening;
doping a second region of the doped layer between the first region and the sidewalls to form a second doped region along the sidewalls between a portion of the first doped region and the sidewalls wherein the second doped region has a conductivity that is opposite to a conductivity of the first doped region; and
forming a transistor on the substrate wherein the second doped region remains distinct from the first doped region.
2. The method of claim 1 wherein doping the first region of the doped layer juxtaposed to at least the portion of the sidewalls of the first opening includes forming a first doping material on a first portion of the sidewalls and driving dopants from the first doping material into the doped layer.
3. The method of claim 2 wherein doping the second region of the doped layer between the first region and the sidewalls includes forming a second doping material on the first portion of the sidewalls.
4. The method of claim 3 wherein forming the first doping material on the first portion of the sidewalls and forming the second doping material on the first portion of the sidewalls includes implanting the first portion of the sidewalls through the first opening.
5. The method of claim 3 further including driving dopants from the second doping material into the first region.
6. The method of claim 3 wherein forming the first doping material on the first portion of the sidewalls and forming the second doping material on the first portion of the sidewalls includes forming a layer of doped material on the sidewalls of the first opening.
7. The method of claim 1 wherein forming the first opening in the doped layer includes forming the first opening through the doped layer and exposing a portion of a surface of the substrate.
8. The method of claim 1 further including forming a source of the semiconductor device overlying the first portion of the doped layer operable to form a current conduction path through the first doped region.
9. The method of claim 1 further including forming a body region in the first doped region and extending a first distance away from the first opening through the first doped region and into the first portion of the doped layer.
10. A method of forming a high breakdown voltage transistor comprising:
providing a semiconductor material of a first conductivity type;
forming a first opening in the semiconductor material including forming sidewalls of the first opening;
doping a first region of the semiconductor material through the first opening including doping the first region with the first conductivity type to form a first doped region of the first conductivity type along the sidewalls and extending into the semiconductor material and leaving a first portion of the semiconductor material that is adjacent to the first doped region and substantially parallel to and distal from the first opening;
doping a second region of the semiconductor material between a portion of the first doped region and a first portion of the sidewalls of the first opening including doping the second region with a second conductivity type that is opposite to the first conductivity type to form a second doped region of the second conductivity type along the sidewalls between a portion of the first doped region and the sidewalls; and
forming a transistor on the substrate wherein the second doped region remains distinct from the first doped region.
11. The method of claim 10 wherein doping the first region of the semiconductor material includes positioning a first doping material of the first conductivity type along at least a second portion of the sidewalls of the first opening.
12. The method of claim 11 wherein positioning the first doping material of the first conductivity type includes using the first doping material to form the first doped region in the semiconductor material juxtaposed to the first opening.
13. The method of claim 11 wherein positioning the first doping material of the first conductivity type along at least the second portion of the sidewalls includes positioning the first doping material through the first opening.
14. The method of claim 11 wherein doping the second region of the semiconductor material includes positioning a second doping material of the second conductivity type along the second portion of the sidewalls of the first opening.
15. The method of claim 10 wherein doping the second region of the semiconductor material between the portion of the first region and the first portion of the sidewalls of the first opening includes forming a second doping material along at least a second portion of the sidewalls of the first opening.
16. The method of claim 10 further including a second opening in the semiconductor material and first distance from the first opening including forming sidewalls of the second opening.
17. The method of claim 16 further including positioning a first doping material along at least a first portion of the sidewalls of the second opening;
using the first doping material to form a third doped region in the semiconductor material juxtaposed to the second opening;
positioning a second doping material along at least the first portion of the sidewalls of the second opening; and
using a second doping material to form a fourth doped region in the semiconductor material between the third doped region and the first portion of the sidewalls of the second opening.
18. The method of claim 17 further including forming a plurality of fifth doped regions of the second conductivity type in the semiconductor material and spaced apart from the third doped region and the fourth doped region.
19. The method of claim 10 further including forming a plurality of third doped regions of the second conductivity type on a surface of the semiconductor material and spaced apart from the second doped region.
20. The method of claim 10 further including forming a body region in the first doped region and extending a first distance away from the first opening through the first doped region and into the first portion of the semiconductor material.