Creating a power distribution arrangement with tapered metal wires for a physical design
View Patent ↗Methods of creating a power distribution arrangement with tapered metal wires for a physical design are provided and described. In one embodiment, a method of creating a power distribution arrangement for a physical design of an integrated circuit includes arranging a plurality of metal wires for power distribution in a desired arrangement. Each metal wire has a width. Furthermore, the metal wires are tapered such that the width is thicker in a core edge area of the physical design than in a core center area of the physical design. In other embodiments, a method of creating a power distribution arrangement for a physical design of a current integrated circuit includes arranging a plurality of metal wires for power distribution in a desired arrangement. The metal wires are tapered using a routing congestion profile and/or a voltage drop profile of a prior physical design of a prior integrated circuit.
1. A method of creating a power distribution arrangement for a physical design of an integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement, each metal wire having a width; and
tapering said metal wires such that said width is thicker in a core edge area of said physical design than in a core center area of said physical design, the tapering of the width based at least in part on a routing congestion profile.
2. The method as recited in claim 1 wherein said physical design is a hierarchical physical design.
3. The method as recited in claim 2 wherein said hierarchical physical design has a top-level and a block-level.
4. The method as recited in claim 2 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
5. The method as recited in claim 1 wherein said desired arrangement has a mesh shape.
6. The method as recited in claim 1 , wherein the routing congestion profile comprises one of a prior routing congestion profile and a current routing congestion profile.
7. The method as recited in claim 1 , wherein the tapering of the width is further based on a voltage drop profile comprising one of a prior voltage drop profile and a current voltage drop profile.
8. A computer-readable medium comprising computer-executable instructions stored therein for performing a method of creating a power distribution arrangement for a physical design of an integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement, each metal wire having a width; and
tapering said metal wires such that said width is thicker in a core edge area of said physical design than in a core center area of said physical design, the tapering of said width based at least in part on a routing congestion profile.
9. The computer-readable medium as recited in claim 8 wherein said physical design is a hierarchical physical design.
10. The computer-readable medium as recited in claim 9 wherein said hierarchical physical design has a top-level and a block-level.
11. The computer-readable medium as recited in claim 9 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
12. The computer-readable medium as recited in claim 8 wherein said desired arrangement has a mesh shape.
13. The computer-readable medium as recited in claim 8 wherein said a routing congestion profile comprises one of a prior routing congestion profile and a current routing congestion profile.
14. The computer-readable medium as recited in claim 8 wherein the tapering of width is further based on a voltage drop profile comprising one of a prior voltage drop profile and a current voltage drop profile.
15. A computer system comprising:
a processor coupled to a bus; and
a memory device couples to said bus, wherein said memory device includes computer-executable instructions stored therein for performing a method of creating a power distribution arrangement for a physical design of an integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement, each metal wire having a width; and
metal wires such that said width is thicker in a core edge area of said physical design than in a core center area of said physical design, the tapering of said width based at least in part on a routing congestion profile.
16. The computer system as recited in claim 15 wherein said physical design is a hierarchical physical design.
17. The computer system as recited in claim 16 wherein said hierarchical physical design has a top-level and a block-level.
18. The computer system as recited in claim 16 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
19. The computer system as recited in claim 15 wherein said desired arrangement has a mesh shape.
20. The computer system as recited in claim 15 wherein said routing congestion profile comprises one of a prior routing congestion profile and a current routing congestion profile.
21. The computer system as recited in claim 15 wherein the tapering of width is further based on a voltage drop profile comprising one of a prior voltage drop profile and a current voltage drop profile.
22. A method of creating a power distribution arrangement for a physical design of a current integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement; and
tapering said metal wires using a routing congestion profile of a prior physical design of a prior integrated circuit.
23. The method as recited in claim 22 wherein said physical design is a hierarchical physical design.
24. The method as recited in claim 23 wherein said hierarchical physical design has a top-level and a block-level.
25. The method as recited in claim 23 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
26. The method as recited in claim 22 wherein said desired arrangement has a mesh shape.
27. The method as recited in claim 22 further comprising tapering said metal wires using a voltage drop profile of said prior physical design of said prior integrated circuit.
28. A computer-readable medium comprising computer-executable instructions stored therein for performing a method of creating a power distribution arrangement for a physical design of a current integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement; and
tapering said metal wires using a routing congestion profile of a prior physical design of a prior integrated circuit.
29. The computer-readable medium as recited in claim 28 wherein said physical design is a hierarchical physical design.
30. The computer-readable medium as recited in claim 29 wherein said hierarchical physical design has a top-level and a block-level.
31. The computer-readable medium as recited in claim 29 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
32. The computer-readable medium as recited in claim 28 wherein said desired arrangement has a mesh shape.
33. The computer-readable medium as recited in claim 28 wherein said method further comprises tapering said metal wires using a voltage drop profile of said prior physical design of said prior integrated circuit.
34. A computer system comprising:
a processor coupled to a bus; and
a memory device couples to said bus, wherein said memory device includes computer-executable instructions stored therein for performing a method of creating a power distribution arrangement for a physical design of a current integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement; and
tapering said metal wires using a routing congestion profile of a prior physical design of a prior integrated circuit.
35. The computer system as recited in claim 34 wherein said physical design is a hierarchical physical design.
36. The computer system as recited in claim 35 wherein said hierarchical physical design has a top-level and a block-level.
37. The computer system as recited in claim 35 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
38. The computer system as recited in claim 34 wherein said desired arrangement has a mesh shape.
39. The computer system as recited in claim 34 wherein said method further comprises tapering said metal wires using a voltage drop profile of said prior physical design of said prior integrated circuit.
40. A method of creating a power distribution arrangement for a physical design of a current integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement; and
tapering said metal wires using a voltage drop profile of a prior physical design of a prior integrated circuit.
41. The method as recited in claim 40 wherein said physical design is a hierarchical physical design.
42. The method as recited in claim 41 wherein said hierarchical physical design has a top-level and a block-level.
43. The method as recited in claim 41 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
44. The method as recited in claim 40 wherein said desired arrangement has a mesh shape.
45. The method as recited in claim 40 further comprising tapering said metal wires using a routing congestion profile of said prior physical design of said prior integrated circuit.
46. A computer-readable medium comprising computer-executable instructions stored therein for performing a method of creating a power distribution arrangement for a physical design of a current integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement; and
tapering said metal wires using a voltage drop profile of a prior physical design of a prior integrated circuit.
47. The computer-readable medium as recited in claim 46 wherein said physical design is a hierarchical physical design.
48. The computer-readable medium as recited in claim 47 wherein said hierarchical physical design has a top-level and a block-level.
49. The computer-readable medium as recited in claim 47 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
50. The computer-readable medium as recited in claim 46 wherein said desired arrangement has a mesh shape.
51. The computer-readable medium as recited in claim 46 wherein said method further comprises tapering said metal wires using a routing congestion profile of said prior physical design of said prior integrated circuit.
52. A computer system comprising:
a processor coupled to a bus; and
a memory device couples to said bus, wherein said memory device includes computer-executable instructions stored therein for performing a method of creating a power distribution arrangement for a physical design of a current integrated circuit, said method comprising:
arranging a plurality of metal wires for power distribution in a desired arrangement; and
tapering said metal wires using a voltage drop profile of a prior physical design of a prior integrated circuit.
53. The computer system as recited in claim 52 wherein said physical design is a hierarchical physical design.
54. The computer system as recited in claim 53 wherein said hierarchical physical design has a top-level and a block-level.
55. The computer system as recited in claim 53 wherein said hierarchical physical design is an abutted-pin hierarchical physical design.
56. The computer system as recited in claim 52 wherein said desired arrangement has a mesh shape.
57. The computer system as recited in claim 52 wherein said method further comprises tapering said metal wires using a routing congestion profile of said prior physical design of said prior integrated circuit.