Patent Assignment
Reel/Frame 053669/0442
Change of Name
Recorded: 2020-09-02
Pages: 6
Assignor
MAGMA DESIGN AUTOMATION, INC.
Executed: 2012-02-22
Assignee
MAGMA DESIGN AUTOMATION LLC
CORPORATION SERVICES COMPANY, 2711 CENTERVILLE ROAD, SUITE 400, WILMINGTON, DELAWARE, 19808
Covered Properties
(31)
Method and System for Automatically Generating Low Level Program Commands as Dependency Graphs from High Level Physical Design Stages
Patent:
6,574,788 →
Application:
09/712,418 →
Method and System for Implementing a User Interface for Performing Physical Design Operations on an Integrated Circuit Netlist
Patent:
6,557,153 →
Application:
09/714,296 →
Apparatus for Optimized Constraint Characterization with Degradation Options and Associated Methods
Method and System for Implementing a Graphical User Interface for Defining and Linking Multiple Attach Points for Multiple Blocks of an Integrated Circuit Netlist
Patent:
6,564,363 →
Application:
09/909,050 →
Method and System for Maintaining Element Abstracts of an Integrated Circuit Netlist Using a Master Library File and Modifiable Master Library File
Patent:
6,564,364 →
Application:
09/909,354 →
Creating Optimized Physical Implementations from High-Level Descriptions of Electronic Design Using Placement-Based Information
System and Method for Limiting Increase in Capacitance Due to Dummy Metal Fills Utilized for Improving Planar Profile Uniformity
Patent:
6,751,785 →
Application:
10/097,978 →
Method for Generating Design Constraints for Modules in a Hierarchical Integrated Circuit Design System
Method of Customizing and Using Maps in Generating the Padring Layout Design
Patent:
6,734,046 →
Application:
10/264,679 →
Method of Generating the Padring Layout Design Using Automation
Patent:
6,823,501 →
Application:
10/264,680 →
Method of Optimizing Placement and Routing of Edge Logic in Padring Layout Design
Patent:
7,117,469 →
Application:
10/264,691 →
Design-Manufacturing Interface via a Unified Model
Reduction of Cross-Talk Noise in Vlsi Circuits
Reduced Architecture Processing Paths
Patent:
7,137,082 →
Application:
10/812,579 →
Modeling Interconnected Propagation Delay for an Integrated Circuit Design
Patent:
7,213,221 →
Application:
10/827,791 →
Floorplanning a Hierarchical Physical Design to Improve Placement and Routing
Patent:
7,155,693 →
Application:
10/831,700 →
Creating a Power Distribution Arrangement with Tapered Metal Wires for a Physical Design
Patent:
7,185,305 →
Application:
10/855,539 →
Optimizing Locations of Pins for Blocks in a Hierarchical Physical Design by Using Physical Design Information of a Prior Hierarchical Physical Design
Patent:
7,114,142 →
Application:
10/855,667 →
Flow Definition Language for Designing Integrated Circuit Implementation Flows
Patent:
7,353,488 →
Application:
10/856,268 →
Asynchronous Control of Memory Self Test
Patent:
7,203,873 →
Application:
10/861,247 →
Redundantly Tied Metal Fill for Ir-Drop and Layout Density Optimization
Patent:
7,240,314 →
Application:
10/861,812 →
Method of Using Strongly Coupled Components to Estimate Integrated Circuit Performance
Patent:
7,337,416 →
Application:
10/880,649 →
Method of Estimating Performance of Integrated Circuit Designs by Finding Scalars for Strongly Coupled Components
Patent:
7,340,698 →
Application:
10/881,195 →
Method of Vector Generation for Estimating Performance of Integrated Circuit Designs
Patent:
7,000,202 →
Application:
10/881,832 →
Parametric Timing Analysis
Patent:
7,346,874 →
Application:
11/048,287 →
Methods and Systems for Mixed-Mode Physical Synthesis in Electronic Design Automation
Lithographically Optimized Placement Tool
Patent:
7,434,188 →
Application:
11/372,557 →
Aggregate Sensitivity for Statistical Static Timing Analysis
Patent:
7,458,049 →
Application:
11/451,905 →
Signal Flow Driven Circuit Analysis and Partitioning Technique
Method for Repeated Block Modification for Chip Routing
Patent:
8,407,650 →
Application:
12/129,916 →
Dynamic Push for Topological Routing of Semiconductor Packages
Patent:
8,006,216 →
Application:
12/134,849 →
Related Assignments
(3)
Other recorded transfers of the patents in this record — the chain of ownership.
Nunc Pro Tunc Assignment
Oct 19, 2012
From: MAGMA DESIGN AUTOMATION LLC
To: SYNOPSYS, INC.
Reel/Frame 029161/0846 →
Release of Security Interest
Nov 11, 2016
From: WELLS FARGO CAPITAL FINANCE, LLC
To: SYNOPSYS, INC.
Reel/Frame 040607/0632 →
Merger
Sep 2, 2020
From: MAGMA DESIGN AUTOMATION LLC
To: SYNOPSYS, INC.
Reel/Frame 053669/0448 →