IP Library Granted Patent US 7,061,227
Granted Patent B2
US 7,061,227 · App. 10/878,681 · Granted Jun 13, 2006

Apparatus and method for calibrating a semiconductor test system

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Quick Facts
Patent No.
US 7,061,227
App. No.
10/878,681
Granted
Jun 13, 2006
Kind
B2
Abstract

A process and device for calibrating a semiconductor component test system includes a first connection, at which a corresponding signal, in particular a calibration signal can be input, and a second and third connection, at which the signal, in particular a calibration signal, can be emitted. The first connection is and/or can be connected via a corresponding line to a first switching apparatus, which is and/or can be connected to the second connection. A second switching apparatus is and/or can be connected to the third connection. Advantageously, the signal is then transferred to the second connection, and barred from the third connection by the first switching apparatus being closed and the second switching apparatus being opened.

Claims (26)

1. A system, comprising:

an apparatus, comprising:

a first connection, at which a corresponding calibration signal can be input;

a second connection at which the calibration signal can be emitted, to which a semiconductor component test apparatus is connectable;

a third connection at which the calibration signal can be emitted, to which a probecard is connectable for contacting semiconductor components to be tested by the semiconductor component test apparatus, wherein

the first connection being at least one of connected and connectable via a corresponding line to a first switch, which is at least one of connected and connectable to the second connection, and to a second switch, which is at least one of connected and connectable to the third connection; and

a calibration apparatus connected to the first connection for selectively calibrating at least one of the semiconductor component test apparatus and the probecard depending on a state of the first and the second switch.

2. An apparatus according to claim 1 , wherein, dependent upon a particular calibration procedure to be performed respectively, either the first switch is closed, and the second switch is opened so that the calibration signal is transferred to the second connection rather than the third connection or the first switch is opened and the second switch is closed so that the calibration signal is transferred to the third connection and not to the second connection.

3. An apparatus according to claim 1 , wherein the switching apparatuses are relays.

4. An apparatus according to claim 1 , wherein the switching apparatuses are transistors.

5. A system comprising:

a first connection, at which a corresponding calibration signal can be input;

a second connection at which the calibration signal can be emitted;

a third connection at which the calibration signal can be emitted, wherein the first connection which is at least one of connected and connectable via a corresponding line to a first switching apparatus, which is at least one of connected and connectable to the second connection, and to a second switching apparatus, which is at least one of connected and connectable to the third connection;

a calibration apparatus connected to the first connection for calibrating a semiconductor component test apparatus; and

at least one of a semiconductor component test card and a probecard connected to the third connection for contacting the semiconductor components to be tested by the semiconductor component test apparatus.

6. A system according to claim 5 , wherein the semiconductor component test apparatus is connected to the second connection.

7. A method for calibrating a semiconductor component test system by using an apparatus, comprising:

inputting a calibration signal at a first connection of the apparatus;

emitting the calibration signal at a second connection of the apparatus, to which the semiconductor component test apparatus is connectable;

emitting the calibration signal at a third connection, to which a probecard is connectable for contacting semiconductor components to be tested by the semiconductor component test apparatus, wherein

the first connection being at least one of connected and connectable via a corresponding line to a first switch, which is at least one of connected and connectable to the second connection, and to a second switch, which is at least one of connected and connectable to the third connection; and

selectively calibrating, using a calibration apparatus connected to the first connection, at least one of the semiconductor component test apparatus and the probecard depending on a state of the first and the second switch.

8. The method according to claim 7 , wherein, dependent upon a particular calibration procedure to be performed respectively, either the first switch is closed, and the second switch is opened so that the calibration signal is transferred to the second connection rather than the third connection or the first switch is opened and the second switch is closed so that the calibration signal is transferred to the third connection and not to the second connection.

9. The method according to claim 7 , wherein the first and second switches are relays.

10. The method according to claim 7 , wherein the first and second switches are transistors.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036877/0513 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023821/0535 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2004
From: BUCKSCH, THORSTEN; ROTH, ARTI PRASAD
To: INFINEON TECHNOLOGIES AG
Reel/Frame 015889/0393 →