IP Library Granted Patent US 6,984,562
Granted Patent B2
US 6,984,562 · App. 10/879,680 · Granted Jan 10, 2006

Method for forming dielectric layer between gates in flash memory device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,984,562
App. No.
10/879,680
Granted
Jan 10, 2006
Kind
B2
Abstract

The present invention provides a method for preventing an oxide film from becoming thick due to the reaction of the oxide film and a floating gate in a method for manufacturing a flash memory device having a dielectric layer consisting of at least one oxide film between the floating gate and a control gate. To this end, a Si—F bonding layer is formed on the surface of a silicon film constituting the floating gate. The Si—F bonding layer is annealed in a nitrogen gas atmosphere to form a Si—N bonding layer. A dielectric layer is then formed.

Claims (36)

1. A method of manufacturing a flash memory device, comprising the steps of:

forming a silicon film pattern constituting a floating gate;

forming a silicon-fluorine (Si—F) bonding layer on the surface of the silicon film pattern in an atmosphere that fluorine is supplied;

performing an annealing process in a nitrogen atmosphere, thus forming a silicon-nitrogen (Si—N) bonding layer on the surface of the silicon film pattern;

forming a dielectric layer having at least one oxide film on the silicon film pattern having the Si—N bonding layer; and

forming a conductive film for forming a control gate on the dielectric layer.

2. The method as claimed in claim 1 , wherein the Si—F bonding layer is formed using a HF solution.

3. The method as claimed in claim 2 , further comprising the steps of, after the step of forming the silicon film pattern, performing cleaning using a mixed solution of H 2 SO 4 , H 2 O 2 and H 2 O;

performing cleaning using a mixed solution of NH 4 F and HF; and

performing cleaning using a mixed solution of NH 4 OH, H 2 O 2 and H 2 O.

4. The method as claimed in claim 1 , wherein the Si—N bonding layer is formed by performing an annealing process in a NH 3 gas atmosphere.

5. The method as claimed in claim 4 , wherein the step of forming the Si—N bonding layer and the step of forming the dielectric layer are performed in-situ.

6. The method as claimed in claim 5 , wherein the dielectric layer is formed by stacking a lower oxide film, a nitride film and an upper oxide film on the silicon film pattern having the Si—N bonding layer.

7. The method as claimed in claim 6 , wherein the silicon film is formed using an amorphous silicon film.

8. The method as claimed in claim 7 , wherein the silicon film is formed using an amorphous silicon film into which phosphorous (P) is doped.

9. A method of manufacturing a flash memory device, comprising the steps of:

forming a silicon film for forming a floating gate;

forming a silicon-fluorine (Si—F) bonding layer on the surface of the silicon film in an atmosphere that fluorine is supplied;

performing an annealing process in a nitrogen atmosphere, thus forming a silicon-nitrogen (Si—N) bonding layer on the surface of the silicon film;

forming a dielectric layer having at least one oxide film on the silicon film having the Si—N bonding layer;

forming a conductive film for forming a control gate on the dielectric layer;

and

patterning the silicon film having the conductive film, the dielectric layer and the Si—N bonding layer.

10. The method as claimed in claim 9 , wherein the Si—F bonding layer is formed using a HF solution.

11. The method as claimed in claim 9 , wherein the Si—N bonding layer is formed by performing an annealing process in a NH 3 gas atmosphere.

12. The method as claimed in claim 11 , wherein the step of forming the Si—N bonding layer and the step of forming the dielectric layer are performed in-situ.

13. The method as claimed in claim 9 , wherein the dielectric layer is formed by stacking a lower oxide film, a nitride film and an upper oxide film on the silicon film having the Si—N bonding layer.

14. A method of manufacturing a flash memory device, comprising the steps of:

forming a silicon film pattern constituting a floating gate;

performing a cleaning process using HF, thus forming a Si—F bonding layer on the surface of the silicon film pattern;

performing an annealing process in a NH 3 gas atmosphere to form a Si—N bonding layer on the surface of the silicon film pattern;

stacking a lower oxide film, a nitride film and an upper oxide film on the silicon film pattern having the Si—N bonding layer, thus forming a dielectric layer; and

forming a control gate on the dielectric layer.

15. The method as claimed in claim 14 , further comprising the steps of, after the step of forming the silicon film pattern, performing cleaning using a mixed solution of H 2 SO 4 , H 2 O 2 and H 2 O;

performing cleaning using a mixed solution of NH 4 F and HF; and

performing cleaning using a mixed solution of NH 4 OH, H 2 O 2 and H 2 O.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2015
From: NUMONYX B. V.
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 036319/0139 →
CHANGE OF NAME Recorded Aug 10, 2015
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 036319/0271 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2006
From: HYNIX SEMICONDUCTOR INC.
To: HYNIX SEMICONDUCTOR INC.; STMICROELECTRONICS S.R.L.
Reel/Frame 018207/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2004
From: PARK, SANG WOOK
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 015789/0536 →