Void free, silicon filled trenches in semiconductors
The present invention provides methods of producing substantially void-free trench structures. After deposition of an a-Si or polysilicon layer in a trench formed in a semiconductor, the a-Si or polysilicon is exposed to hydrogen at an elevated temperature.
1. A method of fabricating a semiconductor device, comprising:
forming a trench having sidewalls in a semiconductor substrate having a top surface;
depositing a layer of a-Si or polysilicon in the trench and in contact with said sidewalls;
etching said a-Si polysilicon in said trench to a selected depth below said top surface; and
annealing the a-Si or polysilicon layer in a hydrogen atmosphere subsequent to said etching to collapse any voids in the trench.
2. The method of claim 1 , wherein the annealing avoids recrystallization of a-Si or polysilicon in the sidewalls.
3. The method of claim 2 , wherein the annealing is performed at a temperature elevated from the temperature at which deposition of the a-Si or polysilicon occurs.
4. The method of claim 1 , wherein the annealing is performed at a temperature greater than about 800° C.
5. The method of claim 4 , wherein the annealing is performed at a temperature between about 850° C. to 950° C.
6. The method of claim 5 , wherein the annealing is performed for less than about 5 minutes.
7. The method of claim 6 , wherein the annealing is performed for less than about 3 minutes.
8. The method of claim 7 , wherein the annealing is performed for between about 10 seconds and 3 minutes.
9. The method of claim 6 , wherein the annealing is performed in an environment of flowing hydrogen.
10. The method of claim 9 , wherein the hydrogen is flowed at a rate of between about two SLPM and 6 SLPM.
11. The method of claim 1 , wherein the anneal is performed in an epitaxy reactor.
12. The method of claim 1 , wherein the anneal is performed in a rapid thermal annealing reactor.
13. The method of claim 1 , wherein the trench is a high aspect ratio trench.
14. The method of claim 13 , wherein the trench has an aspect ratio greater than about 20.
15. A method of fabricating a semiconductor device, comprising:
forming a trench having sidewalls in a semiconductor substrate having a top surface;
depositing a layer of a-Si or polysilicon in the trench and in contact with said sidewalls;
etching said a-Si or polysilicon layer in said trench to a selected depth below said top surface; and then
flowing hydrogen in the trench at an elevated temperature in a manner to avoid recrystallization of a-Si or polysilicon in the sidewalls.
16. The method of claim 15 , wherein hydrogen is flowed at a rate of between about 2 SLPM and 15 SLPM.
17. The method of claim 16 , wherein the temperature is elevated and hydrogen is flowed for less than about 5 minutes.
18. The method of claim 17 , wherein the temperature is elevated to above 900° C.
19. The method of claim 18 , wherein the temperature is elevated for between about 10 seconds and 3 minutes.
20. A method of forming an electrode comprising:
forming an outer electrode in a semiconductor substrate having a top surface;
depositing a layer of a-Si or polysilicon on sidewalls of a trench formed in the semiconductor substrate;
etching said a-Si or polysilicon layer in said trench to a selected depth below said top surface;
exposing the etched a-Si or polysilicon to flowing hydrogen for less than about 5 minutes at a temperature elevated above the temperature at which the a-Si or polysilicon layer was deposited; and
filling said trench above said etched a-Si polysilicon to form an inner electrode.
21. The method of claim 20 , wherein the temperature at which the a-Si or polysilicon is exposed to hydrogen is between about 850° C. and 950° C.
22. The method of claim 1 and further comprising the step of filling said trench above said annealed a-Si or polysilicon layer to form an inner electrode.
23. The method of claim 15 and further comprising the step of filling said trench above said etched a-Si or polysilicon later to form an inner electrode.