Method for forming a capacitor for an integrated circuit and integrated circuit

1. A method for forming a capacitor for an integrated circuit, comprising the following sequence:

providing a substrate;

forming a first electrode including depositing a metal alloy layer formed from conductive material onto the substrate, the metal alloy layer comprising:

a first surface and an exposed second surface, and

grains having grain boundaries, wherein the grains are separated from one another by intergranular regions, the intergranular regions possessing a lower degree of crystalline order than the grains;

electrochemically etching the exposed second surface of the metal alloy layer to increase a surface roughness of the second surface;

oxidizing the metal alloy layer to form a capacitor dielectric on the first electrode; and

forming a second electrode on the capacitor dielectric, wherein, during etching of the metal alloy layer, the intergranular regions are etched selectively to the grains to increase the surface roughness.

2. A method for forming a capacitor for an integrated circuit, comprising the following sequence:

providing a substrate;

forming a first electrode including a metal alloy layer comprising:

a first surface and an exposed second surface, and

grains having grain boundaries separated from one another by intergranular regions, wherein the integranular regions have a lower degree of crystalline order than the grains;

increasing a surface roughness of the second surface of the metal alloy layer via electrochemical etching, wherein the substrate is immersed into an electrolyte and held at an anodic potential;

oxidizing the roughened second surface of the metal alloy layer to form a capacitor dielectric on the first electrode; and

depositing a second electrode,

wherein, during etching of the metal alloy layer, the intergranular regions are etched selectively to the grains.

3. The method of claim 1 further comprising thermally treating the metal alloy layer prior to etching.

4. The method of claim 1 , wherein the metal alloy layer is formed by atomic layer deposition or by chemical vapor deposition.

5. The method of claim 1 , wherein the metal alloy layer is deposited as a continuous conformal liner.

6. The method of claim 1 , wherein providing a substrate includes forming a deep trench in a main surface of the substrate.

7. The method of claim 6 , wherein a lower portion of the deep trench is widened by a wet etching.

8. The method of claim 2 , further comprising thermally treating the metal alloy layer prior to etching.

9. The method of claim 2 , wherein the metal alloy layer is formed by atomic layer deposition or by chemical vapor deposition.

10. The method of claim 2 , wherein the metal alloy layer is deposited as a continuous conformal liner.

11. The method of claim 2 , wherein the step of providing a substrate includes forming a deep trench in a main surface of the substrate.

12. The method of claim 11 , wherein a lower portion of the deep trench is widened by a wet etching step.

13. The method of claim 1 , wherein the metal alloy comprises at least a first metal and a second metal.

14. The method of claim 13 , wherein the metal alloy comprises a binary metal alloy.

15. The method of claim 1 , wherein the intergranular regions are etched at a higher rate than the grains to promote pitting of the metal alloy layer.

16. The method of claim 1 , wherein the thermal treatment is effective to reduce an average size grain size of the grains.

17. The method of claim 16 , wherein the thermal treatment reduces the average grain size to less than 20 nm.