IP Library Granted Patent US 7,056,768
Granted Patent B2
US 7,056,768 · App. 10/892,398 · Granted Jun 6, 2006

Cutting method and method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,056,768
App. No.
10/892,398
Granted
Jun 6, 2006
Kind
B2
Abstract

A cutting method for separating individual semiconductor devices by cutting boundary portions in a group of semiconductor devices made up by arranging a plurality of semiconductor devices in which a ductile first layer and a second layer are stacked on a peripheral side thereof, the cutting method comprises a cutting step of cutting the first and second layers by moving a first rotary body from the boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked; and a burr removal step of removing burrs from the first layer by moving a second rotary body, softer than the first rotary body and wider than the first rotary body in the direction of rotational axis, from the cut boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked.

Claims (22)

1. A cutting method for separating individual semiconductor devices by cutting boundary portions in a group of semiconductor devices made up by arranging a plurality of semiconductor devices in which a ductile first layer and a second layer are stacked on a peripheral side thereof, the cutting method comprising:

a cutting step of cutting the first and second layers by moving a first rotary body from the boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked; and

a burr removal step of removing burrs from the first layer by moving a second rotary body, softer than the first rotary body and wider than the first rotary body in the direction of rotational axis, from the cut boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked.

2. The cutting method according to claim 1 , wherein the second rotary body has a hardness capable of removing the burrs that depends on the hardness of the first layer.

3. The cutting method according to claim 1 , wherein water is ejected onto the boundary portions to allow removed burrs to flow out to an outer circumferential side of the group of semiconductor devices in at least one of the cutting and burr removal steps.

4. The cutting method according to claim 1 , wherein in a step preceding the cutting step, the group of semiconductor devices is affixed on top of an adhesive material layer in an adhesive sheet in which the adhesive material layer is formed on a base material.

5. The cutting method according to claim 4 , wherein the adhesive sheet is an ultraviolet adhesive sheet that sets and diminishes in adhesive strength under ultraviolet radiation, and wherein ultraviolet light is radiated, in a step following the burr removal step, only to a region, in which the group of semiconductor devices is affixed, from the side of the base material surface in the adhesive sheet.

6. The cutting method according to claim 1 , wherein, in order to expose electrodes as the first layer around a mounting surface that is joined via a joining agent to a mounting circuit board, the group of semiconductor devices is formed by sealing the electrodes and a semiconductor element, that are electrically connected to each other in each of partitioned regions partitioned on a conductive foil, with a sealing agent as the second layer having an insulating property.

7. The cutting method according to claims 1 , the group of semiconductor devices are formed by stacking a metal wiring layer as the first layer on top of each of the partitioned regions in the semiconductor substrate serving as the second layer.

8. A cutting method for separating individual semiconductor devices by cutting boundary portions in a group of semiconductor devices made up by arranging a plurality of semiconductor devices in which a ductile first layer and a second layer are stacked on a peripheral side thereof, the cutting method comprising:

a first cutting step of cutting the first layer and removing burrs from the first layer by moving a first rotary body from the boundary portions of the group of semiconductor devices on the side of the first layer in the direction in which the first and second layers are stacked; and

a second cutting step of cutting the second layer by moving a second rotary body, harder than the first rotary body and narrower than the first rotary body in the direction of rotational axis, from the boundary portions in which the first layer is cut in the direction in which the first and second layers are stacked.

9. The cutting method according to claim 8 , wherein the first rotary body has a hardness capable of removing the burrs that depends on the hardness of the first layer.

10. The cutting method according to claim 8 , wherein water is ejected onto the boundary portions to allow removed burrs to flow out to an outer circumferential side of the group of semiconductor devices in at least one of the first and second cutting steps.

11. The cutting method according to claim 8 , wherein in a step preceding the first cutting step, the group of semiconductor devices is affixed on top of an adhesive material layer in an adhesive sheet in which the adhesive material layer is formed on a base material.

12. The cutting method according to claim 11 , wherein the adhesive sheet is an ultraviolet adhesive sheet that sets and diminishes in adhesive strength under UV radiation, and wherein ultraviolet light is radiated, in a step following the burr removal step, only to a region, in which the group of semiconductor devices is affixed, from the side of the base material surface and from the side of other surface completely reverse to the surface on which the group of semiconductor devices is affixed in the adhesive sheet.

13. A semiconductor device manufacturing method for separating individual semiconductor devices by cutting boundary portions in a group of semiconductor devices made up by arranging a plurality of semiconductor devices in which a ductile first layer and a second layer are stacked on a peripheral side thereof, the semiconductor device manufacturing method comprising:

a cutting step of cutting the first and second layers by moving a first rotary body from the boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked; and

a burr removal step of removing burrs from the first layer by moving a second rotary body, softer than the first rotary body and wider than the first rotary body in the direction of rotational axis, from the cut boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked.

14. A semiconductor device manufacturing method for separating individual semiconductor devices by cutting boundary portions in a group of semiconductor devices made up by arranging a plurality of semiconductor devices in which a ductile first layer and a second layer are stacked on a peripheral side thereof, the semiconductor device manufacturing method comprising:

a first cutting step of cutting the first layer and removing burrs from the first layer by moving a first rotary body from the boundary portions of the group of semiconductor devices on the side of the first layer in the direction in which the first and second layers are stacked; and

a second cutting step of cutting the second layer by moving a second rotary body, harder than the first rotary body and narrower than the first rotary body in the direction of rotational axis, from the boundary portions in which the first layer is cut in the direction in which the first and second layers are stacked.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: KANTO SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033713/0296 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2004
From: KAMEYAMA, KOUJIRO; MITA, KIYOSHI
To: SANYO ELECTRIC CO., LTD.; KANTO SANYO SEMICONDUCTORS CO., LTD.
Reel/Frame 015184/0362 →