Stacked semiconductor packages and method therefor
View Patent ↗A stackable semiconductor package and method includes providing a first semiconductor package having a first plurality of lower leads and a first plurality of upper leads. A second semiconductor package having a second plurality of lower leads is provided. The second plurality of lower leads is attached to the first plurality of upper leads to form a stack of semiconductor packages.
1. A method of stacking semiconductor packages comprising:
providing a first semiconductor package having a first plurality of lower leads and a first plurality of upper leads;
providing a second semiconductor package having a second plurality of lower leads; and attaching the second plurality of lower leads to the first plurality of upper leads.
2. The method of stacking semiconductor packages as claimed in claim 1 , wherein:
providing a first semiconductor package provides a first plurality of lower leads on opposing edges of the first semiconductor package and provides a second plurality of upper leads on opposing edges of the first semiconductor package.
3. The method of stacking semiconductor packages as claimed in claim 1 , wherein:
providing a first semiconductor package having a first plurality of upper leads provides at least one of gull-wing leads, J-bent leads, terminal pads, wrap around die pads, and combinations thereof.
4. The method of stacking semiconductor packages as claimed in claim 1 , wherein:
providing a second semiconductor package having a second plurality of lower leads provides at least one of gull-wing leads, J-bent leads, terminal pads, and combinations thereof.
5. The method of stacking semiconductor packages as claimed in claim 1 , wherein:
providing a first semiconductor package and providing a second semiconductor package provide a first wrap around die pad and a second wrap around die pad respectively; and
further comprises:
attaching the second wrap around die pad to the first wrap around die pad.
6. A method of manufacturing a stackable semiconductor package comprising:
providing a die pad;
attaching a die to the die pad;
providing a plurality of lower leads adjacent opposing sides of the die pad;
providing a plurality of upper leads adjacent alternate opposing sides of the die pad;
wire bonding the die to the die pad, the plurality of lower leads, and the plurality of upper leads; and
encapsulating the die to expose a lower surface of the die pad, a portion of the plurality of lower leads, and a portion of the plurality of upper leads.
7. The method of manufacturing a stackable semiconductor package as claimed in claim 6 , wherein:
providing a plurality of upper leads provides at least one of gull-wing leads, J-bent leads, terminal pads, wrap around die pads, and combinations thereof.
8. The method of manufacturing a stackable semiconductor package as claimed in claim 6 , wherein:
providing a plurality of lower leads provides at least one of gull-wing leads, J-bent leads, terminal pads, and combinations thereof.
9. The method of manufacturing a stackable semiconductor package as claimed in claim 6 , wherein:
providing a plurality of upper leads provides a widened lead tip.
10. The method of manufacturing a stackable semiconductor package as claimed in claim 6 , wherein:
providing a plurality of upper leads provides a plated lead tip.
11. A stack of semiconductor packages comprising:
a first semiconductor package having a first plurality of lower leads and a first plurality of upper leads; and
a second semiconductor package having a second plurality of lower leads attached to the first plurality of upper leads.
12. The stack of semiconductor packages as claimed in claim 11 , wherein:
the first semiconductor package comprises a first plurality of lower leads on opposing edges of the first semiconductor package and a second plurality of upper leads on opposing edges of the first semiconductor package.
13. The stack of semiconductor packages as claimed in claim 11 , wherein:
the first semiconductor package having a first plurality of upper leads comprises at least one of gull-wing leads, J-bent leads, terminal pads, wrap around die pads, and combinations thereof.
14. The stack of semiconductor packages as claimed in claim 11 , wherein:
the second semiconductor package having a second plurality of lower leads comprises at least one of gull-wing leads, J-bent leads, terminal pads, and combinations thereof.
15. The stack of semiconductor packages as claimed in claim 11 , wherein:
the first semiconductor package comprises a first wrap around die pad;
the second semiconductor package comprises a second wrap around die pad; and
the second wrap around die pad is attached to the first wrap around die pad.
16. A stackable semiconductor package comprising:
a die pad;
a die attached to the die pad;
a plurality of lower leads adjacent opposing sides of the die pad;
a plurality of upper leads adjacent alternate opposing sides of the die pad;
wires bonding the die to the die pad, the plurality of lower leads, and the plurality of upper leads; and
an encapsulant to expose a lower surface of the die pad, a portion of the plurality of lower leads, and a portion of the plurality of upper leads.
17. The stackable semiconductor package as claimed in claim 16 , wherein:
the plurality of upper leads comprises at least one of gull-wing leads, J-bent leads, terminal pads, wrap around die pads, and combinations thereof.
18. The stackable semiconductor package as claimed in claim 16 , wherein:
the plurality of lower leads comprises at least one of gull-wing leads, J-bent leads, terminal pads, and combinations thereof.
19. The stackable semiconductor package as claimed in claim 16 , wherein:
the plurality of upper leads comprises a widened lead tip.
20. The stackable semiconductor package as claimed in claim 16 , wherein:
the plurality of upper leads comprises a plated lead tip.