IP Library Granted Patent US 7,312,107
Granted Patent B2
US 7,312,107 · App. 10/910,805 · Granted Dec 25, 2007

Semiconductor device and manufacturing method thereof

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Quick Facts
Patent No.
US 7,312,107
App. No.
10/910,805
Granted
Dec 25, 2007
Kind
B2
Abstract

A manufacturing method of a semiconductor device formed in a chip size package is improved to enhance a yield and reliability. A window to expose first wirings is formed only in a region of a semiconductor substrate where the first wirings exist. As a result, area of the semiconductor substrate bonded to a supporting body through an insulation film and a resin is increased to prevent cracks in the supporting body and separation of the semiconductor substrate from the supporting body. A slit is formed along a dicing line after forming the window, the slit is covered with a protection film and then the semiconductor substrate is diced into individual semiconductor dice. Thus, separation on a cut surface or at an edge of the semiconductor dice, which otherwise would be caused by contact of the blade in the dicing can be prevented.

Claims (34)

1. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate comprising a plurality of semiconductor dice, a boundary region between two of the semiconductor dice, an insulation film formed on a surface of the semiconductor substrate to cover at least the boundary region, and a pair of wirings formed on the insulation film so that a center of the boundary region is located between the pair of wirings;

bonding a supporting body to the surface of the semiconductor substrate to cover the pair of wirings; and

forming an opening in the semiconductor substrate so as to expose the insulation film between the pair of wirings and to expose at least part of the insulation film that is under the pair of wirings,

wherein the formation of the opening in the semiconductor substrate is performed so as not to expose any portion of the pair of wirings.

2. The method of claim 1 , wherein the opening covers only the pair of the wirings.

3. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate comprising a plurality of semiconductor dice, a boundary region between two of the semiconductor dice, a first insulation film formed on a first surface of the semiconductor substrate to cover at least the boundary region, and a pair of first wirings formed on the first insulation film so that a center of the boundary region is located between the pair of first wirings;

bonding a supporting body to the first surface of the semiconductor substrate to cover the pair of first wirings;

removing part of the semiconductor substrate to expose part of the first insulation film from a second surface of the semiconductor substrate;

forming a second insulation film on the second surface of the semiconductor substrate; selectively etching the first insulation film and the second insulation film to expose at least portions of the pair of first wirings;

forming a second wiring on the second surface of the semiconductor substrate so that the second wiring is connected to the pair of first wirings;

forming a groove in the second surface of the semiconductor substrate along the boundary region; and

dicing the supporting body bonded to the semiconductor substrate along the groove to separate the semiconductor substrate into individual semiconductor dice.

4. The method of claim 3 , wherein a maximum width of a region of the supporting body removed as a result of the formation of the groove is narrower than a spacing between the pair of first wirings.

5. The method of claim 3 , wherein the forming of the groove is such that the groove reaches the supporting body.

6. The method of claim 3 , wherein a width of a region of the support body removed by the dicing is narrower than a spacing between the pair of the first wirings.

7. The method of claim 3 , wherein the dicing is performed so that an edge of the semiconductor substrate formed between the pair of the first wirings as a result of the formation of the groove does not come into a contact with a dicing blade.

8. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate comprising a plurality of semiconductor dice, a boundary region between two of the semiconductor dice, an insulation film formed on a surface of the semiconductor substrate to cover at least the boundary region, and a wiring formed on the insulation film so as to be positioned off a center of the boundary region;

bonding a supporting body to the surface of the semiconductor substrate to cover the wiring; and

forming an opening in the semiconductor substrate so as to expose part of the insulation film that is under the wiring,

wherein the formation of the opening in the semiconductor substrate is performed so as not to expose any portion of the wiring.

9. The method of claim 8 , wherein the opening is not longer than the wiring in a longitudinal direction of the boundary region.

10. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate comprising an insulation film formed on the semiconductor substrate and a plurality of pairs of connection pads formed on the insulation film;

bonding a supporting body to the semiconductor substrate to cover the pairs of connection pads; and

forming a plurality of windows in the semiconductor substrate so that each of the windows is positioned at a corresponding pair of connection pads and exposes a corresponding portion of the insulation film therein.

11. The method of claim 10 , further comprising dicing the supporting body bonded to the semiconductor substrate to cut between connection pads of each of the pairs of connection pads.

12. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate comprising an insulation film formed on the substrate and a plurality of connection pads formed on the insulation film;

bonding a supporting body to the semiconductor substrate to cover the connection pads; and

forming a plurality of windows in the semiconductor substrate so that each of the windows is positioned at a corresponding connection pad and exposes a corresponding portion of the insulation film therein.

13. The method of claim 12 , further comprising dicing the supporting body bonded to the semiconductor substrate along a center line of each of the windows.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: KANTO SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033713/0296 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2004
From: NOMA, TAKASHI; KITAGAWA, KATSUSHIKO; OTSUKA, HISAO; SUZUKI, AKIRA; SEKI, YOSHINORI; TAKAO, YUKIHIRO; YAMAGUCHI, KEIICHI; WAKUI, MOTOAKI; IIDA, MASANORI
To: SANYO ELECTRIC CO., LTD.; KANTO SANYO SEMICONDUCTORS CO., LTD.
Reel/Frame 015983/0594 →