Double-sided etching technique for semiconductor structure with through-holes
View Patent ↗Double-sided etching techniques are disclosed for providing a semiconductor structure with one or more through-holes. The through-holes may be sealed hermetically such as by a feed-through metallization process. The feed-through metallization process may provide electrical contact to an opto-electronic or integrated circuit encapsulated in a package with the semiconductor structure used as a lid.
1. A method of providing a semiconductor structure with one or more through-holes, the method comprising:
performing a double-sided through-hole etching to form at least one through-hole from a first surface of the semiconductor structure toward a second surface opposite the first surface, wherein performing a double-sided through-hole etching includes:
etching from the first surface of the semiconductor structure to define an opening for each of the one or more through-holes; and
etching from the second surface to define a cavity having a cross-section larger than the cross-section of each of the one or more through-holes; and
providing a hermetic seal for the at least one through-hole.
2. The method of claim 1 wherein the cavity has tapered sides.
3. The method of claim 1 wherein the cavity has a tapered pyramidal shape.
4. The method of claim 1 wherein each through-hole has a cross-sectional area that decreases in the direction from the first surface toward the second surface.
5. The method of claim 1 wherein the semiconductor structure comprises silicon.
6. The method of claim 1 wherein the semiconductor structure comprises a III–IV compound semiconductor material.
7. The method of claim 1 wherein providing a hermetical seal for the one or more through-holes includes using a feed-through metallization process.
8. The method of claim 7 wherein providing a hermetic seal includes using an electroplating technique to seal the one or more through-holes.
9. The method of claim 7 wherein providing a hermetic seal includes:
providing an adhesion layer; and
providing a plating base.
10. The method of claim 7 including using the semiconductor structure as a lid to encapsulate an integrated circuit, wherein the feed-through metallization provides electrical contact from an exterior of the semiconductor structure to the integrated circuit.
11. The method of claim 7 including using the semiconductor structure as a lid to encapsulate an opto-electronic component, wherein the feed-through metallization provides electrical contact from an exterior of the semiconductor structure to the opto-electronic component.
12. The method of claim 1 wherein providing a hermetic seal includes:
providing an adhesion layer;
providing a plating base;
providing a feed-through metallization;
providing a diffusion barrier;
providing a wetting layer; and
providing an anti-oxidation barrier.
13. A method comprising:
performing a doubled-sided etching to form at least one through-hole from a first surface of a semiconductor structure to a second surface opposite the first surface;
providing a hermetic seal for the at least one through-hole;
using the semiconductor structure as a lid to encapsulate an integrated circuit; and
establishing an electrical connection to the integrated circuit via the one or more through-holes.
14. A method comprising:
performing a double-sided etching to form at least one through-hole from a first surface of a semiconductor structure to a second surface opposite the first surface;
providing a hermetic seal for the at least one through-hole;
using the semiconductor structure as a lid to encapsulate an opto-electronic component; and
establishing an electrical connection to the opto-electronic component via the one or more through-holes.