Integration of multiple gate dielectrics by surface protection
View Patent ↗A multiple gate oxidation process is provided. The process comprises the steps of (a) providing a silicon substrate ( 203 ) having a sacrificial oxide layer ( 207 ) thereon; (b) depositing and patterning a first layer of photoresist ( 209 ) on the sacrificial oxide layer, thereby forming a first region in which the sacrificial oxide layer is exposed; (c) etching the exposed sacrificial oxide layer within the first region, thereby forming a first etched region; (d) growing a first oxide layer ( 211 ) within the first etched region; (e) depositing and patterning a second layer of photoresist ( 213 ) on the sacrificial oxide layer and first oxide layer, thereby forming a second region in which the sacrificial oxide layer is exposed; (f) etching the exposed sacrificial oxide layer within the second region, thereby forming a second etched region; and (g) growing a second oxide layer ( 215 ) within the second etched region.
1. A method for forming a multi gate oxide structure, comprising the steps of:
providing a semiconductor substrate having an initial oxide layer thereon;
depositing and patterning a first layer of photoresist on the initial oxide layer, thereby forming a first region in which the initial oxide layer is exposed;
etching the initial oxide layer within the first region, thereby forming a first etched region;
forming a first gate oxide layer within the first etched region;
depositing and patterning a second layer of photoresist on the initial oxide layer and first oxide layer, thereby forming a second region in which the initial oxide layer is exposed;
etching the exposed initial oxide layer within the second region, thereby forming a second etched region; and
growing a second oxide layer within the second etched region;
wherein the first etched region is vertically disposed by a distance d 1 from a major surface of the substrate, wherein the second etched region is vertically disposed by a distance d 2 from the major surface, and wherein d 2 >d 1 .
2. The method of claim 1 , wherein the first and second gate oxide layers have first and second average thicknesses, respectively, and wherein the first average thickness is less than the second average thickness.
3. A multi gate oxide structure, comprising:
a semiconductor substrate having first and second regions and having a first major surface, wherein said first region of the substrate is vertically disposed by a distance d 1 from said first major surface, and wherein said second region of the substrate is vertically disposed by a distance d 2 from said first major surface, wherein d 2 >d 1 ;
a first gate oxide layer having a first average thickness disposed within said first region; and
a second gate oxide layer having a second average thickness disposed within said second region.
4. The device of claim 3 , wherein the first and second gate oxide layers have first and second average thicknesses, respectively, and wherein the first average thickness is less than the second average thickness.
5. The device of claim 3 , wherein said first region has a first depth d 1 and wherein said second region has a depth d 2 , and wherein d 2 >d 1 .
6. The device of claim 3 , wherein said first region has a first height d 1 and wherein said second region has a height d 2 , and wherein d 2 >d 1 .
7. The device of claim 3 , wherein said first region has a first height d 1 and wherein said second region has a depth d 2 .
8. A method for forming a semiconductor device, comprising:
providing a semiconductor substrate having a major surface, wherein said substrate contains a first region which is vertically disposed by a distance d 1 from the major surface, wherein said substrate contains a second region which is vertically disposed by a distance d 2 from the major surface, and wherein d 2 >d 1 ; and
forming a layer of gate oxide with the first and second regions.
9. The method of claim 8 , wherein said first region extends above the major surface.
10. The method of claim 9 , wherein said second region also extends above the major surface.
11. The method of claim 8 , wherein said first region extends below the major surface.
12. The method of claim 11 , wherein said second region also extends below the major surface.
13. The method of claim 8 , wherein the step of forming a layer of gate oxide within the first and second regions includes the step of forming a single layer of oxide which extends across the first and second regions.
14. The method of claim 8 , wherein the step of forming a layer of gate oxide within the first and second regions includes the steps of:
forming a first layer of gate oxide within the first region; and
forming a second layer of gate oxide within the second region.
15. The method of claim 8 , wherein the step of forming a layer of gate oxide within the first and second regions includes the steps of:
selectively exposing a first region of the substrate;
forming a first gate oxide layer within the first region;
selectively exposing a second region of the substrate; and
forming a second gate oxide layer within the second region.
16. The method of claim 15 , wherein the step of selectively exposing the first region of the substrate includes the steps of:
forming a first mask over the sacrificial oxide layer such that a first portion of the sacrificial oxide layer extending over the first region is exposed and a second portion of the sacrificial oxide layer extending over the second region is covered; and
etching the first portion of the sacrificial oxide layer.
17. The method of claim 16 , wherein the step of selectively exposing the second region of the substrate includes the steps of:
forming a second mask over the sacrificial oxide layer such that a second portion of the sacrificial oxide layer extending over the second region is exposed and the first gate oxide layer is covered; and
etching the second portion of the sacrificial oxide layer.
18. The method of claim 15 , wherein said substrate contains a third region which is vertically disposed by a distance d 3 , from the major surface, wherein d 3 >d 2 >d 1 , and further comprising the step of forming a layer of gate oxide within the first, second and third regions.
19. The method of claim 18 , wherein the step of forming a layer of gate oxide within the third region includes the steps of:
selectively exposing the third region of the substrate; and
forming a third gate oxide layer within the third region.
20. The method of claim 8 , further comprising the step of forming a single layer of sacrificial oxide which extends across the first and second regions.
21. The method of claim 20 , further comprising the step of subjecting the sacrificial oxide to chemical mechanical polishing.
22. The device of claim 8 , wherein the first and second gate oxide layers have first and second average thicknesses, respectively, and wherein the first average thickness is less than the second average thickness.
23. The device of claim 8 , wherein said first region has a depth d 1 , wherein said second region has a depth d 2 .
24. The device of claim 8 , wherein said first region has a height d 1 and wherein said second region has a height d 2 .
25. The device of claim 8 , wherein said first region has a height d 1 and wherein said second region has a depth d 2 .
26. A method for forming a multi gate oxide structure, comprising:
providing a substrate having an initial oxide layer thereon, said substrate having a first major surface;
selectively exposing a first region of the substrate;
forming a first gate oxide layer within the first region;
selectively exposing a second region of the substrate; and
forming a second gate oxide layer within the second region;
wherein the first region of the substrate is vertically disposed by a distance d 1 from the first major surface, and wherein the second region of the substrate is vertically disposed by a distance d 2 from the first major surface.