IP Library Granted Patent US 7,189,610
Granted Patent B2
US 7,189,610 · App. 10/966,519 · Granted Mar 13, 2007

Semiconductor diode and method therefor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,189,610
App. No.
10/966,519
Granted
Mar 13, 2007
Kind
B2
Abstract

In one embodiment, a diode is formed with anodes on two surfaces of a semiconductor substrate.

Claims (26)

1. A method of forming a diode comprising:

providing a substrate having a first surface and a second surface that is on an opposite side of the substrate from the first surface;

forming a first anode of the diode on the first surface of the substrate; and

forming a second anode of the diode on the second surface of the substrate.

2. The method of claim 1 further including forming a first cathode of the diode on the first surface of the substrate.

3. The method of claim 2 wherein forming the first cathode of the diode on the first surface includes forming a first doped region on the first surface surrounding the first cathode and forming a second doped region on the first surface surrounding the first anode.

4. The method of claim 3 further including forming a third doped region on the second surface and surrounding the second anode.

5. The method of claim 3 wherein forming the third doped region includes forming the first doped region, the second doped region, and the third doped region of a second conductivity type.

6. The method of claim 2 further including forming a second cathode on the second surface of the substrate.

7. The method of claim 1 wherein providing the substrate having the first surface and the second surface includes providing a bulk semiconductor substrate of a first conductivity type having a first surface and a second surface, forming a first epitaxial layer of the first conductivity type on the first surface, and forming a second epitaxial layer of the first conductivity type on the second surface.

8. The method of claim 1 wherein forming the first anode of the diode on the first surface of the substrate includes forming the first anode on a first portion of the first surface and forming a cathode on a second portion of the first surface on the substrate.

9. The method of claim 1 wherein forming the first anode of the diode on the first surface of the substrate includes forming a silicide on a first portion of the first surface and further including forming an opening in a second portion of the first surface and electrically contacting a cathode of the diode through the opening.

10. The method of claim 1 wherein forming the first anode of the diode on the first surface of the substrate includes forming an epitaxial layer on a surface of a bulk semiconductor substrate, forming a silicide on a first portion of a surface of the epitaxial layer, and further including forming an opening through a second portion of the surface of the epitaxial layer and exposing a portion of the bulk semiconductor substrate, and forming a cathode of the diode on the bulk semiconductor substrate.

11. A diode comprising:

a substrate having a first surface and a second surface that is on an opposite side of the substrate from the first surface;

a first anode on the first surface; and

a second anode on the second surface.

12. The diode of claim 11 wherein the substrate having the first surface and the second surface includes a bulk semiconductor substrate having a first epitaxial layer on one surface of the bulk semiconductor substrate and a second epitaxial layer on a second surface wherein a surface of the first epitaxial layer forms the first surface of the substrate and a surface of the second epitaxial layer forms the second surface of the substrate.

13. The diode of claim 12 further including an opening through a portion of the first epitaxial layer and an electrical contact to the bulk semiconductor substrate within the opening.

14. The diode of claim 11 further including a first doped region surrounding one side of the first anode and a second doped region surrounding a second side of the first doped region.

15. The diode of claim 14 further including the first doped region surrounding a cathode of the diode.

16. The diode of claim 11 further including a first cathode on the first surface.

17. The diode of claim 16 further including a second cathode on the second surface.

18. The diode of claim 16 wherein the first cathode includes an opening in the first surface with an electrical contact to the substrate within the opening.

19. The diode of claim 11 wherein the first anode and the second anode are metal-silicides.

20. The diode of claim 11 wherein the first anode and the second anode are doped regions.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038631/0345 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: JPMORGAN CHASE BANK, N.A. (ON ITS BEHALF AND ON BEHALF OF ITS PREDECESSOR IN INTEREST, CHASE MANHATTAN BANK)
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038632/0074 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2005
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 016183/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2004
From: MORAN, JOHN DAVID; KRUSE, BLANCA ESTELA; MORENO, JOSE ROGELIO
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 015904/0868 →