IP Library Granted Patent US 41,039
Granted Patent E1
US 41,039 · App. 10/974,046 · Granted Dec 15, 2009

Stackable chip package with flex carrier

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Quick Facts
Patent No.
US 41,039
App. No.
10/974,046
Granted
Dec 15, 2009
Kind
E1
Abstract

A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.

Claims (18)

1. A stackable integrated circuit chip package, comprising:

a flex circuit including a flexible substrate and a conductive pattern formed thereon, the flexible substrate having a central portion and an opposed end portions, the conductive pattern starting from the central portion and terminating at the opposed end portions; and

an integrated circuit chip electrically connected to the conductive pattern at the central portion;

the flex circuit being wrapped about at least a portion of the integrated circuit chip such that the conductive pattern is electrically connectable to at least one other stackable integrated circuit chip package.

2. A method of assembling a stackable integrated circuit chip package, comprising the steps of:

(a) providing a flex circuit including a flexible substrate having a conductive pattern formed thereon, the flexible substrate defining a central portion and an opposed end portions, the conductive pattern starting from the central portion and terminating at the opposed end portions;

(b) electrically connecting an integrated circuit chip to the conductive pattern at the central portion of the flexible substrate;

(c) wrapping at least one end portion about the integrated circuit chip such that the conductive pattern is electrically connectable to at least one other stackable integrated circuit chip package; and

(d) securing the integrated circuit chip and the flex circuit to each other.

3. The method of claim 2 wherein step (c) comprises:

(1) soldering the integrated circuit chip to the conductive pattern; and

(2) adhesively affixing portions of the substrate of the flex circuit to the integrated circuit chip.

4. The method of claim 2 further comprising the step of:

(d) electrically connecting the conductive pattern to another stackable integrated circuit chip package.

5. A stackable integrated circuit chip package, comprising: a flex circuit including a flexible substrate and a conductive pattern formed thereon, the flexible substrate having a central portion and opposed end portions, the conductive pattern being electrically connected to first and second conductive pad arrays disposed on the central portion on opposite surfaces of the flex substrate and to a third conductive pad array disposed on one of the opposed end portions; and an integrated circuit chip electrically connected to the conductive pattern at the central portion and the first conductive pad array, the flex circuit being wrapped about at least a portion of the integrated circuit chip to expose the third conductive pad array.

6. A method of assembling a stackable integrated circuit chip package, comprising the steps of: ( a ) providing a flex circuit including a flexible substrate and a conductive pattern formed thereon, the flexible substrate having a central portion and opposed end portions, the conductive pattern being electrically connected to first and second conductive pad arrays disposed on the central portion on opposite surfaces of the flex substrate and to a third conductive pad array disposed on one of the opposed end portions; ( b ) electrically connecting an integrated circuit chip to the conductive pattern at the central portion and the first conductive pad array; ( c ) wrapping the flex circuit about at least a portion of the integrated circuit chip to expose the third conductive pad array; and ( d ) securing the integrated circuit chip and the flex circuit to each other.

7. A stackable integrated circuit chip package, comprising: a flex circuit including a flexible substrate and a conductive pattern formed thereon, the flexible substrate having a central portion and opposed end portions, the conductive pattern being electrically connected to a central portion conductive pad array disposed on the central portion of the flex substrate and to plural conductive pads disposed on one of the opposed end portions; mad an integrated circuit chip electrically connected to the conductive pattern at the central portion conductive pad array; the flex circuit being wrapped about at least a portion of the integrated circuit chip such that the plural conductive pads disposed on one of the opposed end portions are exposed; and the plural conductive pads disposed on one of the opposed end portions defining an end portion conductive pad array that is electrically connectable to the contacts of another integrated circuit chip.

8. A method of assembling a stackable integrated circuit chip package, comprising the steps of: ( a ) providing a flex circuit including a flexible substrate and a conductive pattern formed thereon, the flexible substrate having a central portion and opposed end portions, the conductive pattern being electrically connected to a central portion conductive pad array disposed on the central portion of the flux substrate and to plural conductive pads disposed on one of the opposed end portions; ( b ) electrically connecting an integrated circuit chip to the conductive pattern at the central portion conductive pad array; ( c ) wrapping the flex circuit about the integrated circuit chip such that the plural conductive pads disposed on one of the opposed end portions are exposed and define an end portion conductive pad array that is electrically connectable to the contacts of another integrated circuit chip; and ( d ) securing the integrated circuit chip and the flex circuit to each other.

Assignments (8)
MERGER Recorded Dec 27, 2015
From: OVID DATA CO. LLC
To: TAMIRAS PER PTE. LTD., LLC
Reel/Frame 037373/0481 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2012
From: DPAC TECHNOLOGIES CORP. (FORMERLY KNOWN AS DENSE-PAC MICROSYSTEMS, INC.)
To: STAKTEK GROUP L.P.
Reel/Frame 029412/0093 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2012
From: FORTHUN, JOHN A.
To: DENSE-PAC MICROSYSTEMS, INC.
Reel/Frame 029389/0548 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2012
From: ENTORIAN TECHNOLOGIES INC.
To: OVID DATA CO. LLC
Reel/Frame 029389/0672 →
CHANGE OF NAME Recorded Dec 2, 2012
From: DENSE-PAC MICROSYSTEMS, INC.
To: DPAC TECHNOLOGIES CORP.
Reel/Frame 029395/0945 →
CHANGE OF NAME Recorded Dec 2, 2012
From: STAKTEK GROUP, L.P.
To: ENTORIAN TECHNOLOGIES L.P.
Reel/Frame 029395/0958 →
MERGER Recorded Oct 25, 2012
From: ENTORIAN GP LLC
To: ENTORIAN TECHNOLOGIES INC.
Reel/Frame 029195/0114 →
MERGER Recorded Oct 25, 2012
From: ENTORIAN TECHNOLOGIES L.P.
To: ENTORIAN GP LLC
Reel/Frame 029195/0048 →