IP Library Granted Patent US 7,291,529
Granted Patent B2
US 7,291,529 · App. 10/987,135 · Granted Nov 6, 2007

Methods of processing semiconductor wafer backsides having light emitting devices (LEDs) thereon

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Quick Facts
Patent No.
US 7,291,529
App. No.
10/987,135
Granted
Nov 6, 2007
Kind
B2
Abstract

Processing a semiconductor wafer can include forming a plurality of Light Emitting Devices (LED) on a semiconductor wafer having a first thickness. The plurality of LEDs on the wafer are brought into contact with a surface of a carrier to couple the wafer to the carrier. The first thickness of the wafer is reduced to a second thickness that is less than the first thickness by processing the backside of the wafer. The carrier is separated from the plurality of LEDs on the wafer and the wafer is cut to separate the plurality of LEDs from one another. Related devices are also disclosed.

Claims (42)

1. A method of processing a semiconductor wafer to form a light emitting device, comprising:

forming a plurality of Light Emitting Devices (LED) on a semiconductor wafer having a first thickness;

contacting the plurality of LEDs on the wafer to a surface of a carrier to couple the wafer to the carrier;

reducing the first thickness of the wafer to a second thickness that is less than the first thickness by processing a backside surface of the wafer;

separating the carrier from the plurality of LEDs on the wafer; and

cutting the wafer to separate the plurality of LEDs, wherein reducing the first thickness of the wafer to a second thickness is followed by:

processing the backside surface of the wafer opposite the plurality of LEDs to improve light extraction wherein processing comprises laser patterning the backside surface; and

forming a plurality of respective contacts on the backside surface opposite where respective bonding pads are to be formed on the plurality of LEDs.

2. A method according to claim 1 wherein the first thickness comprises a thickness from about 250 μm to about 400 μm.

3. A method according to claim 1 wherein reducing the first thickness of the wafer comprises grinding, lapping, and/or etching the backside of the wafer to reduce the first thickness of the wafer to the second thickness of less than about 150 μm.

4. A method according to claim 1 wherein reducing the first thickness of the wafer comprises grinding, lapping, and/or etching the backside of the wafer to reduce the first thickness of the wafer to the second thickness of less than about 120 μm.

5. A method according to claim 4 wherein grinding the backside of the wafer comprises grinding the backside of the wafer using an in-feed grinder or a creep feed grinder.

6. A method according to claim 1 wherein cutting the wafer comprises cutting the wafer using a saw blade to form straight edges on the separated plurality of LEDs.

7. A method according to claim 1 wherein cutting the wafer comprises:

cutting score lines on the wafer to form beveled grooves between the plurality of LEDs on the wafer; and

separating the plurality of LEDs on the wafer from one another along the score lines.

8. A method according to claim 1 wherein cutting the wafer comprises cutting the wafer with a saw blade to depth beneath a surface of the wafer of less than about a length of a beveled tip of the saw blade.

9. A method according to claim 8 wherein the depth comprises less than about 120 μm.

10. A method according to claim 1 wherein forming a plurality of respective contacts comprises forming a plurality of ohmic contacts using laser annealing.

11. A method according to claim 1 wherein separating the carrier from the plurality of LEDs on the wafer comprises heating, melting or dissolving an adhesive layer sufficient to cause separation of the plurality of LEDs from the carrier.

12. A method according to claim 1 wherein the wafer comprises a Silicon Carbide or sapphire wafer.

13. A method according to claim 1 wherein processing the backside surface of the wafer comprises patterning the backside surface of the wafer using a laser to form multiple three-dimensional geometric patterns on the backside surface.

14. A method of processing a semiconductor wafer to form a light emitting device, comprising:

forming a plurality of Light Emitting Devices (LED) on a semiconductor wafer having a first thickness;

contacting the plurality of LEDs on the wafer to a surface of a carrier to couple the wafer to the carrier;

reducing the first thickness of the wafer to a second thickness that is less than the first thickness by processing a backside surface of the wafer;

separating the carrier from the plurality of LEDs on the wafer;

cutting the wafer to separate the plurality of LEDs, wherein reducing the first thickness of the wafer to a second thickness is followed by:

processing the backside surface of the wafer opposite the plurality of LEDs to improve light extraction; and

forming a plurality of respective contacts on the backside surface opposite where respective bonding pads are to be formed on the plurality of LEDs, wherein forming a plurality of respective contacts comprises forming a plurality of ohmic contacts using laser annealing.

15. A method according to claim 14 wherein the first thickness comprises a thickness from about 250 μm to about 400 μm.

16. A method according to claim 14 wherein reducing the first thickness of the wafer comprises grinding, lapping, and/or etching the backside of the wafer to reduce the first thickness of the wafer to the second thickness of less than about 150 μm.

17. A method according to claim 14 wherein reducing the first thickness of the wafer comprises grinding, lapping, and/or etching the backside of the wafer to reduce the first thickness of the wafer to the second thickness of less than about 120 μm.

18. A method according to claim 17 wherein grinding the backside of the wafer comprises grinding the backside of the wafer using an in-feed grinder or a creep feed grinder.

19. A method according to claim 14 wherein cutting the wafer comprises cutting the wafer using a saw blade to form straight edges on the separated plurality of LEDs.

20. A method according to claim 14 wherein cutting the wafer comprises: cutting score lines on the wafer to form beveled grooves between the plurality of LEDs on the wafer; and

separating the plurality of LEDs on the wafer from one another along the score lines.

21. A method according to claim 14 wherein cutting the wafer comprises cutting the wafer with a saw blade to depth beneath a surface of the wafer of less than about a length of a beveled tip of the saw blade.

22. A method according to claim 21 wherein the depth comprises less than about 120 μm.

23. A method according to claim 14 wherein separating the carrier from the plurality of LEDs on the wafer comprises heating, melting or dissolving an adhesive layer sufficient to cause separation of the plurality of LEDs from the carrier.

24. A method according to claim 14 wherein the wafer comprises a Silicon Carbide or sapphire wafer.

25. A method according to claim 14 wherein processing the backside surface of the wafer comprises patterning the backside surface of the wafer using a laser to form multiple three-dimensional geometric patterns on the backside surface.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 56012 FRAME 200. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 9, 2025
From: CREE, INC.
To: CREELED, INC.
Reel/Frame 071874/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2021
From: CREE, INC.
To: CREE LED, INC.
Reel/Frame 056012/0200 →