Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device includes a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer, which are sequentially laminated on a substrate. It also includes an emitter electrode, a base electrode, and a collector electrode, which are respectively formed on the emitter cap layer, the base layer, and the sub-collector layer. The sub-collector layer is made up of a first sub-collector layer adjacent to the substrate and a second sub-collector layer adjacent to the collector layer. In the area between adjacent device elements, the first sub-collector layer has an element insulating region created by ion implantation, and the second sub-collector layer has a recess-shaped element insulating region.
1. A semiconductor device including a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer sequentially laminated on a substrate, and an emitter electrode, a base electrode, and a collector electrode respectively formed on the emitter cap layer, the base layer, and the sub-collector layer,
wherein the sub-collector layer comprises a first sub-collector layer adjacent to the substrate and a second sub-collector layer adjacent to the collector layer, and
the first sub-collector layer includes an element insulating region created by ion implantation, and the second sub-collector layer includes a recess-shaped element insulating region, each region created between adjacent device elements.
2. The semiconductor device according to claim 1 , wherein the first and second sub-collector layers are formed of different materials having etching selectivity against each other.
3. The semiconductor device according to claim 1 , further comprising an etching stop layer placed between the first and second sub-collector layers, allowing selective etching for each of the first and second sub-collector layers, and including the recess-shaped element insulating region continuing from the second sub-collector layer.
4. The semiconductor device according to claim 1 , further comprising an etching stop layer placed between the first and second sub-collector layers, allowing selective etching for each of the first and second sub-collector layers, and including the element insulating region continuing from the first sub-collector layer, created by ion implantation.
5. The semiconductor device according to claim 4 , wherein the etching stop layer is formed of InGaP having a crystal structure where superlattice ordering partially occurs.