IP Library Granted Patent US 7,193,294
Granted Patent B2
US 7,193,294 · App. 11/002,995 · Granted Mar 20, 2007

Semiconductor substrate comprising a support substrate which comprises a gettering site

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Quick Facts
Patent No.
US 7,193,294
App. No.
11/002,995
Granted
Mar 20, 2007
Kind
B2
Abstract

A semiconductor substrate includes a support substrate 1 has gettering sites 10 for gettering impurity metal, an embedded insulating film 2 which is provided on the support substrate 1 and contains oxides of an element whose single bond energy to oxygen is higher than that to silicon, and a semiconductor layer (an SOI layer) 3 provided on the embedded insulating film 2.

Claims (41)

1. A semiconductor substrate, comprising:

a support substrate comprising a gettering site for gettering an impurity metal;

an embedded insulating film provided on the support substrate and comprising an oxide of an element whose single bond energy to oxygen is higher than that to silicon;

a semiconductor layer provided on the embedded insulating film; and

at least one of:

a support-side silicon oxide film interposed between the support substrate and the embedded insulating film; and

an active-layer-side silicon oxide film interposed between the embedded insulating film and the semiconductor layer.

2. The semiconductor substrate as set forth in claim 1 , wherein the embedded insulating film comprises oxides of one or more elements selected from the group consisting of hafnium, zirconium, aluminum, titanium, tantalum, and lanthanum.

3. The semiconductor substrate as set forth in claim 1 , wherein the embedded insulating film comprises silicates of one or more elements selected from the group consisting of hafnium, zirconium, aluminum, titanium, tantalum, and lanthanum.

4. The semiconductor substrate as set forth in claim 1 , wherein the gettering site comprises a SiO 2 substance generated by precipitation of oxygen in the support substrate.

5. The semiconductor substrate as set forth in claim 1 , wherein the gettering site comprises a micro imperfection.

6. The semiconductor substrate as set forth in claim 1 , wherein the gettering site comprises a phosphorous diffused layer.

7. The semiconductor substrate as set forth in claim 1 , wherein the gettering site comprises a micro cavity.

8. The semiconductor substrate as set forth in claim 1 , wherein

the embedded insulating film comprises at least one element selected from the group consisting of hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Alumina; Al 2 O 3 ), titanium oxide (TiO 2 ), tantalum oxide (Ta 2 O 5 ), or lanthanum oxide (La 2 O 3 ).

9. The semiconductor substrate as set forth in claim 1 , wherein

the embedded insulating film comprises at least one element selected from the group consisting of a hafnium aluminum oxide (Hf x Al y O z ), a hafnium zirconium oxide (Hf x Zr y O z ), a zirconium aluminum oxide (Zr x Al y O z ), a titanium aluminum oxide (Ti x Al y O z ), a titanium zirconium oxide (Ti x Zr y O z ), a titanium hafnium oxide (Ti x Hf y O z ), a tantalum aluminum oxide (Ta x Al y O z ), a tantalum zirconium oxide (Ta x Zr y O z ), a hafnium tantalum oxide (Ta x Hf y O z ), a tantalum titanium oxide (Ta x Ti y O z ), a tantalum aluminum oxide (La x Al y O z ), a lanthanum zirconium oxide (La x Zr y O z ), a lanthanum hafnium oxide (La x Hf y O z ), a lanthanum titanium oxide (La x Ti y O z ), and a lanthanum tantalum oxide (La x Ta y O z ), wherein X, Y, Z are integers.

10. The semiconductor substrate as set forth in claim 1 , wherein

the embedded insulating film comprises at least one element selected from the group consisting of a Hf silicate (Hf—Si—O-based), a Zr silicate (Zr—Si—O-based), an Al silicate (Al—Si—O-based), a Ti silicate (Ti—Si—O-based), a Ta silicate (Ta—Si—O-based), a La silicate (La—Si—O-based), a HfZr silicate (Hf—Zr—Si—O-based), a HfAl silicate (Hf—Al—Si—O-based), a ZrAl silicate (Zr—Al—Si—O-based), a TiHf silicate (Ti—Hf—Si—O-based), a TiAl silicate (Ti—Al—Si—O-based), a TiZr silicate (Ti—Zr—Si—O-based), a TaHf silicate (Ta—Hf—Si—O-based), a TaAl silicate (Ta—Al—Si—O-based), a TaZr silicate (Ta—Zr—Si—O-based), a TaTi silicate (Ta—Ti—Si—O-based), a LaHf silicate (La—Hf—Si—O-based), a LaAl silicate (La—Al—Si—O-based), a LaZr silicate (La—Zr—Si—O-based), a LaTi silicate (La—Ti—Si—O-based), and a LaTa silicate (La—Ta—Si—O-based).

11. The semiconductor substrate as set forth in claim 1 ,

wherein the gettering site comprises an impurity region which is formed by implanting phosphor ions (P+) into the support substrate and annealing the thus-implanted substrate.

12. The semiconductor substrate as set forth in claim 11 , wherein the gettering site is formed by implanting phosphor ions (P+) into the substrate with an implantation energy of 100 KeV and a dose of 5×10 15 atoms/cm 2 .

13. A semiconductor substrate, comprising:

a support substrate comprising a gettering site for gettering an impurity metal;

an embedded insulating film provided on the support substrate and comprising an oxide of an element whose single bond energy to oxygen is higher than that to silicon;

a semiconductor layer provided on the embedded insulating film; and

an embedded semiconductor layer which is interposed between the embedded insulating film and the semiconductor layer

wherein a lattice constant of the embedded semiconductor layer is different from that of the semiconductor layer.

14. The semiconductor substrate as set forth in claim 13 , wherein the embedded insulating film comprises oxides of one or more element selected from a group consisting of hafnium, zirconium, aluminum, titanium, tantalum, and lanthanum.

15. The semiconductor substrate as set forth in claim 13 , wherein the embedded insulating film comprises silicates of one or more element selected from a group consisting of hafnium, zirconium, aluminum, titanium, tantalum, and lanthanum.

16. The semiconductor substrate as set forth in claim 13 , wherein the gettering site comprises SiO 2 substance generated by precipitation of oxygen in the support substrate.

17. The semiconductor substrate as set forth in claim 13 , wherein the gettering site comprises a micro imperfection.

18. The semiconductor substrate as set forth in claim 13 , wherein the gettering site comprises a phosphorous diffused layer.

19. The semiconductor substrate as set forth in claim 13 ,

wherein the embedded semiconductor layer comprising a monocrystalline silicon germanium.

20. A semiconductor substrate, comprising:

a support substrate comprising a gettering site for gettering an impurity metal;

an embedded insulating film provided on the support substrate and comprising an oxide of an element whose single bond energy to oxygen is higher than that to silicon;

an embedded semiconductor film provided on the embedded insulating film; and

a strained semiconductor layer provided on the embedded semiconductor film,

wherein a lattice constant of the strained semiconductor layer is different from that of the embedded semiconductor film.

Assignments (5)
CHANGE OF NAME Recorded Mar 13, 2013
From: COVALENT SILICON CORPORATION
To: GLOBALWAFERS JAPAN CO., LTD.
Reel/Frame 029991/0421 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2013
From: COVALENT MATERIALS CORPORATION
To: COVALENT SILICON CORPORATION
Reel/Frame 029962/0497 →
MERGER Recorded Sep 13, 2007
From: TOSHIBA CERAMICS CO., LTD.
To: COVALENT MATERIALS CORPORATION
Reel/Frame 019817/0749 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 2ND INVENTOR'S FIRST NAME AND 4TH INVENTOR'S FIRST NAME PREVIOUSLY RECORDED ON REEL 016324 FRAME 0306. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 17, 2007
From: YOSHIMURA, REIKO; TADA, TSUKASA; IZUNOME, KOJI; KASHIMA, KAZUHIKO
To: TOSHIBA CERAMICS CO., LTD.
Reel/Frame 018766/0307 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2005
From: YOSHIMURA, REIKO; TADA, OSAMU; IZUNOME, KOJI; KASHIMA, KAZUHIRO
To: TOSHIBA CERAMICS CO., LTD.
Reel/Frame 016324/0306 →