High slew ECL device and method therefor
View Patent ↗In one embodiment, an ECL logic device uses a capacitor to couple a positive voltage to an output and reduce the rise time of the output signal.
1. A differential amplifier comprising:
a first transistor having a first current carrying electrode coupled to a first output of the differential amplifier, a second current carrying electrode, and a control electrode coupled to receive a first input signal;
a second transistor having a first current carrying electrode coupled to a second output of the differential amplifier, a second current carrying electrode coupled to the second current carrying electrode of the first transistor, and a control electrode coupled to receive a second input signal;
a third transistor having a control electrode coupled to receive the first input signal, a first current carrying electrode, and a second current carrying electrode;
a first capacitor having a first terminal coupled to the second current carrying electrode of the third transistor, and a second terminal coupled to the first current carrying electrode of the second transistor;
a fourth transistor having a control electrode coupled to receive the second input signal, a first current carrying electrode, and a second current carrying electrode; and
a second capacitor having a first terminal coupled to the second current carrying electrode of the fourth transistor, and a second terminal coupled to the first current carrying electrode of the first transistor.
2. The differential amplifier of claim 1 wherein the first current carrying electrode of the first transistor and the first current carrying electrode of the second transistor are coupled to receive a power supply voltage.
3. The differential amplifier of claim 2 wherein the first current carrying electrode of the first transistor is coupled to receive the power supply voltage through a first resistor.
4. The differential amplifier of claim 3 wherein the first current carrying electrode of the second transistor is coupled to receive the power supply voltage through a second resistor.
5. The differential amplifier of claim 1 wherein the second current carrying electrode of the first transistor and the second current carrying electrode of the second transistor are operably coupled to a first current source.
6. The differential amplifier of claim 1 wherein the second current carrying electrode of the third transistor is operably coupled to a second current source.
7. The differential amplifier of claim 1 wherein the second current carrying electrode of the fourth transistor is operably coupled to a third current source.
8. A method of forming a differential amplifier comprising:
configuring a first transistor of a differential pair of a differential amplifier to receive a first input signal and responsively couple a first output signal to a first output;
configuring a second transistor of the differential pair to receive a second input signal and responsively couple a second output signal to a second output; and
configuring a first capacitor to couple a first signal that is representative of the first input signal to the second output.
9. A method of forming a differential amplifier comprising:
configuring a first transistor of a differential pair of a differential amplifier to receive a first input signal; and
configuring a first capacitor to couple a first signal that is representative of the first input signal to a first output of the differential amplifier wherein the first capacitor is isolated from an input of the first transistor including coupling a first terminal of the first capacitor to a first current carrying electrode of a second transistor of the differential pair and coupling a second terminal of the first capacitor to a third transistor that is not one of the differential pair.
10. The method of claim 9 wherein coupling the second terminal of the first capacitor to the third transistor that is not one of the differential pair includes coupling the second terminal of the first capacitor to a first current carrying electrode of the third transistor, coupling a second current carrying electrode of the third transistor to receive a power supply input, and coupling a control electrode of the third transistor to receive the first input signal.
11. The method of claim 9 further including coupling a second current carrying electrode of the second transistor of the differential pair to a first current carrying electrode of the first transistor of the differential pair.
12. The method of claim 11 further including coupling a first terminal of a second capacitor to a second currentcarrying electrode of the first transistor wherein the second capacitor is isolated from the second transistor of the differential pair.
13. The method of claim 9 further including configuring the second transistor of the differential pair to receive a second input signal and configuring a second capacitor to couple a second signal that is representative of the second input signal to a second output of the differential amplifier wherein the second capacitor is isolated from an input of the second transistor.
14. The method of claim 13 wherein configuring thesecond capacitor to couple the second signal that isrepresentative of the second input signal to the second output of the differential amplifier includes coupling a first terminal of the second capacitor to a first currentcarrying electrode of the first transistor and coupling a second terminal of the second capacitor to a fourth transistor that is not one of the differential pair.
15. The method of claim 14 wherein coupling the first terminal of the second capacitor to the first current carrying electrode of the first transistor and coupling the second terminal of the second capacitor to the fourth transistor that is not one of the differential pair includes coupling the second terminal of the second capacitor to a first current carrying electrode of the fourth transistor and coupling a second current carrying electrode of the fourth transistor to receive a power supply voltage.
16. The method of claim 15 further including coupling a control electrode of the fourth transistor to receive the second input signal.
17. A method of forming a differential amplifier comprising:
configuring a differential amplifier to receive a first input signal on a first input and responsively form a first output signal on a first output, and receive a second input signal on a second input and responsively form a second output signal on a second output; and
configuring the differential amplifier to capacitively couple a first signal representative of the first input signal to the second output and to buffer the first signal from the first input signal.
18. The method of claim 17 wherein configuring thedifferential amplifier to capacitively couple the first signal representative of the first input signal to the second output and to buffer the first signal from the first input signal includes coupling a buffer transistor to receive the first input signal, responsively form the first signal, and couple the first signal to a first terminal of a first capacitor.
19. The method of claim 17 further including configuring the differential amplifier to capacitively couple a second signal representative of the second input signal to the first output and to buffer the second signal from the second input signal.
20. The method of claim 19 wherein configuring thedifferential amplifier to capacitively couple the second signal representative of the second input signal to the first output and to buffer the second signal from thesecond input signal includes coupling a buffer transistor to receive the second input signal, responsively form the second signal, and couple the second signal to a first terminal of a capacitor.