Method for forming a gate electrode in a non volatile memory device
View Patent ↗Disclosed herein is a method for forming a gate electrode of a non-volatile memory device. In an etch process of a gate electrode for defining the gate electrode, the etch process is performed by selectively adding an addition gas containing carbon. This prevents undercuts from being formed on a sidewall of a control gate when a floating gate is etched. It is thus possible to form the gate electrode having a vertical profile.
1. A method for forming a gate electrode of a non-volatile memory device, comprising the steps of:
(a) providing a semiconductor substrate in which a tunnel oxide film, a first polysilicon film for a floating gate, a dielectric film and a second polysilicon film for a control gate are formed;
(b) performing a first etch process in which an addition gas containing carbon is added to a main etch gas, thus patterning the second polysilicon film, the dielectric film and a portion of the first polysilicon film; and
(c) precluding the supply of the addition gas, and then performing a second etch process using the main etch gas, thereby patterning the first polysilicon film and the tunnel oxide film which remain without being patterned.
2. The method as claimed in claim 1 , wherein the main etch gas employs Cl 2 or HBr.
3. The method as claimed in claim 1 , wherein the addition gas is supplied 0.5 to 2 times more than the main etch gas.
4. The method as claimed in claim 3 , wherein the addition gas is any one of CF 4 , CHF 3 , C 2 F 6 , CH 2 F 2 , C 4 F 8 , C 3 8 , C 5 F 8 and CH 3 F, or a mixing gas of at least two of them.
5. The method as claimed in claim 1 , wherein a passivation layer is formed on some of the second polysilicon film, the dielectric film and the first polysilicon film, which are patterned and exposed by carbon of the addition gas in the first etch process, in the step (b).
6. The method as claimed in claim 1 , further comprising the step of forming a metal silicide layer on the second polysilicon film in the step (a).
7. The method as claimed in claim 6 , wherein before the step (b), the metal silicide layer is etched and patterned by a third etch process using Cl 2 or SF 6 gas.
8. The method as claimed in claim 7 , wherein the first to third etch processes are performed in the same etch chamber.
9. The method as claimed in claim 6 , further comprising the step of forming a hard mask on the metal silicide layer in the step (a).
10. The method as claimed in claim 6 , wherein the hard mask serves as an etch mask in the first etch process.
11. The method as claimed in claim 1 , wherein the first and second etch processes are performed in the same etch chamber.