Process for producing metallic interconnects and contact surfaces on electronic components
View Patent ↗A process produces metallic interconnects and contact surfaces on electronic components using a copper-nickel-gold layer structure. The copper core of the interconnects and contact surfaces is deposited by electroplating by means of a first resist mask made from positive resist. The copper core of the interconnects and contact surfaces is surrounded by a nickel-gold layer by means of a second resist mask. The interconnects and contact surfaces are produced by means of two resist masks arranged one on top of the other, in such a way that the copper which forms the core of the interconnect is completely surrounded by the nickel-gold layer, which extends above the copper core, and an adjoining layer that extends beneath the copper core and comprises a diffusion barrier and seed layer.
1. A process for producing a copper interconnect on an electronic component, the process comprising:
forming a first resist mask over a component;
applying a diffusion barrier and then a second copper seed layer over the first resist mask;
forming a second resist mask over the second seed layer so that the second seed layer remains uncovered in a contact region;
depositing a copper core of an interconnect on the uncovered second seed layer by electroplating;
stripping the second resist mask;
etching the diffusion barrier and the second seed layer;
applying a nickel-gold layer over the copper core; and
stripping the first resist mask.
2. The process of claim 1 wherein the second resist mask is formed in a pattern that corresponds to a pattern of the first resist mask.
3. The process of claim 2 wherein forming the first resist mask comprises using a lithographic mask with a pattern and wherein forming the second resist mask comprises using a lithographic mask with the same pattern.
4. The process of claim 1 wherein the diffusion barrier comprises tantalum nitride.
5. The process of claim 1 wherein the diffusion barrier and the second copper seed layer are applied by sputtering.
6. The process of claim 1 wherein the electronic component comprises a semiconductor component.
7. The process of claim 1 wherein the electronic component comprises a polymer component.
8. The process of claim 1 wherein the first resist mask is formed over a first copper seed layer.
9. A method of making an electronic component, the method comprising:
providing an electronic component having a contact area overlying a surface thereof:
forming a first resist mask over the electronic component, the first resist mask patterned to form an opening over the contact area;
forming a conductive layer over the first resist mask, the conductive layer electrically contacting the contact area;
forming a second resist mask over the electronic component, the second resist mask patterned to form an opening over the contact area;
depositing a conductor over the contact area, the conductor electrically contacting the contact area;
removing the second resist mask;
etching portions of the conductive layer outside of the contact area; and
removing the first resist mask.
10. The method of claim 9 wherein:
forming a conductive layer comprises forming a diffusion barrier followed by forming a seed layer of copper; and
forming a conductor comprising electrodepositing copper.
11. The method of claim 10 wherein the diffusion barrier comprises tantalum nitride.
12. The method of claim 10 and further comprising forming a nickel-gold layer over the copper conductor.
13. The method of claim 10 and further comprising forming a lower seed layer of copper over the surface of the electronic component wherein the first resist mask is formed over the lower seed layer.
14. The method of claim 13 and further comprising removing portions of the lower seed layer that are not beneath the conductor, the removing being performed after removing the first resist mask.
15. The method of claim 10 wherein the diffusion barrier and the seed layer of copper are formed by sputtering.
16. The method of claim 9 wherein the opening in the first resist mask includes a sidewall at a first angle relative to the surface of the electronic component and wherein the opening in the second resist mask includes a sidewall at a second angle relative to the surface of the electronic component, the first angle being different than the second angle.
17. The method of claim 16 wherein the second angle is closer to normal relative to the surface than the first angle.
18. The method of claim 16 wherein the first resist mask is formed using a lithographic mask with a pattern and the second resist mask is formed using a lithographic mask with the same pattern.
19. The method of claim 9 wherein the electronic component comprises a semiconductor component.
20. The method of claim 9 wherein the electronic component comprises a polymer component.