Method for fabricating a field effect transistor
View Patent ↗A method for fabricating a field effect transistor, in which, after the etching of the gate electrode, the removal of the etching mask is omitted since the etching mask serves as a gate dielectric. The etching mask or the dielectric has a self-assembled monolayer of an organic compound.
1. A method for fabricating a field effect transistor, comprising:
a) providing a substrate;
b) depositing a gate electrode onto a whole area of the substrate;
c) bringing the gate electrode into contact with an organic compound in order to obtain a self-assembled monolayer of the organic compound arranged on the gate electrode, wherein the organic compound includes a radical that interacts with a surface of the gate electrode, the radical comprising a constituent selected from the group consisting of: SiCl 3 , SiCl 2 alkyl, SiCl(alkyl) 2 , Si(OR) 3 , Si(OR) 2 alkyl, SiOR(alkyl) 2 , PO(OH) 2 , PO(OR) 2 (alkyl), CHO, CH═CH 2 , COH, CONH 2 , CONHOH, CONHNH 2 , OH, NH 2 , SH, or COOH;
d) etching the gate electrode with the self-assembled monolayer of the organic compound arranged thereon such that the self-assembled monolayer essentially is not removed;
e) depositing a source electrode and a drain electrode without removing the self-assembled monolayer; and
f) depositing a semiconductor material either before or after depositing the source and drain electrodes.
2. The method as claimed in claim 1 , wherein after etching the gate electrode with the self-assembled monolayer of the organic compound arranged thereon, the gate electrode is rewetted with the organic compound.
3. The method as claimed in claim 1 , wherein the gate electrode includes a metal oxide layer at the surface.
4. The method as claimed in claim 3 , wherein the gate electrode is selected from the group consisting of: titanium, titanium nitride, tantalum, tantalum nitride, tungsten, titanium tungsten, tantalum tungsten, tungsten nitride, tungsten carbonitride, iridium oxide, ruthenium oxide, strontium ruthenium oxide, or from a combination of these layers and or materials and, has a layer made of silicon, titanium nitride silicon, silicon oxynitride, silicon oxide, silicon carbide or silicon carbonitride.
5. The method as claimed in claim 1 , wherein the process of bringing the gate electrode into contact with the organic compound is effected by a printing technique.
6. The method as claimed in claim 5 , wherein the process of bringing the gate electrode into contact with the organic compound is effected by microcontact printing.
7. The method as claimed in claim 1 , wherein the organic compound includes a radical that interacts with the surface of the gate electrode.
8. The method as claimed in claim 1 , wherein the etching of the gate electrode with the self-assembled monolayer of the organic compound arranged thereon is effected by wet-chemical etching methods.
9. The method as claimed in claim 8 , wherein the etching is effected by a solution comprising phosphoric acid.
10. The method as claimed in claim 9 , wherein the solution additionally comprises nitric acid.
11. The method as claimed in claim 9 , wherein the solution additionally comprises acetic acid.
12. The method as claimed in claim 1 , wherein the source and drain electrodes, independent of each other, are selected from the group consisting of: gold, silver, copper, platinum, palladium, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, titanium tungsten, tantalum tungsten, tungsten nitride, tungsten carbonitride, iridium oxide, ruthenium oxide, strontium ruthenium oxide, or from a combination of these layers and/or materials and, additionally have a layer made of silicon, titanium nitride silicon, silicon oxynitride, silicon oxide, silicon carbide or silicon carbonitride.
13. The method as claimed in claim 1 , wherein the thickness of the gate electrode is between approximately 20 and 300 nm.
14. The method as claimed in claim 1 , wherein the thickness of the gate electrode is between approximately 20 and 100 nm.
15. The method as claimed in claim 1 , wherein the thickness of the gate electrode is between approximately 20 and 50 nm.
16. The method as claimed in claim 1 , wherein the thickness of the self-assembled monolayer of the organic compound is between approximately 1 and 20 nm.
17. The method as claimed in claim 1 , wherein the thickness of the self-assembled monolayer of the organic compound is between approximately 2 and 10 nm.
18. The method as claimed in claim 1 , wherein the semiconductor material includes an organic semiconductor material.
19. The method as claimed in claim 18 , wherein the organic semiconductor material is selected from the group consisting of pentacene, tetracene and polythiophene.
20. The method as claimed in claim 1 , wherein the radical further comprises a constituent R having a group selected from the group consisting of: n-alkyl (thio)ether, linear aromatic groups of the formula —(C 6 H 4 ) n —, where n is an integer between 2 and 6, and a heteroaromatic group.