Semiconductor device and manufacturing method of the same
View Patent ↗The invention is directed to an improvement of reliability in a chip-size package type semiconductor device and a manufacturing method thereof. A semiconductor substrate formed with a pad electrode is prepared, and a first protection layer formed of epoxy resin is formed on a front surface of the semiconductor substrate. Then, a via hole is formed from a back surface of the semiconductor substrate to the pad electrode. A wiring layer is then formed from the via hole of the semiconductor substrate, being electrically connected with the pad electrode through the via hole. Then, a second protection layer and a conductive terminal are formed, and the semiconductor substrate is separated into individual semiconductor dies by dicing.
1. A semiconductor device comprising:
a semiconductor die having a first surface and second surface;
a pad electrode formed on the first surface, a via hole being formed between the pad electrode and the second surface;
a first protection layer attached to the first surface so as to cover the pad electrode;
an insulation film disposed on an inside wall of the via hole; and
a metal portion disposed in the via hole to be in contact with the pad electrode.
2. The semiconductor device of claim 1 , further comprising a conductive terminal disposed on the metal portion.
3. The semiconductor device of claim 1 , further comprising a wiring layer disposed on the second surface and connected to the metal portion.
4. The semiconductor device of claim 3 , further comprising a second protection layer disposed on the second surface so as to cover the metal portion and the wiring layer and a conductive terminal disposed on the metal portion or the wiring layer through an opening formed in the second protection layer.
5. The semiconductor device of claim 1 , wherein the first protection layer is made of an epoxy resin.
6. The semiconductor device of claim 3 , wherein the first protection layer is made of an epoxy resin
7. The semiconductor device of claim 1 , wherein the first protection layer is made of a resist material.
8. The semiconductor device of claim 3 , wherein the first protection layer is made of a resist material.