Signal detection method, frequency detection method, power consumption control method, signal detecting device, frequency detecting device, power consumption control device and electronic apparatus
View Patent ↗A power consumption control device for detecting output of a pulse signal from an output terminal of an oscillator as an operation monitoring target and outputting a power consumption reduction signal when the pulse signal is not detected in a predetermined period of time, includes a p-type transistor and an n-type transistor which are connected in series and have a gate to which the output terminal is connected, and detecting means for detecting a through current flowing through the p-type transistor and n-type transistor, and outputs a power consumption reduction signal when the through current is not detected in a predetermined period of time.
1. A signal detection method comprising the steps of:
detecting a through current flowing through a circuit to which a signal is inputted from an input terminal; and
detecting input of the signal, based on whether or not the through current flowed through the circuit; wherein
the circuit includes a p-type transistor and an n-type transistor with gates to which the signal is inputted, and includes a transistor to perform a current mirror function.
2. A signal detection method comprising the steps of:
detecting a through current flowing through a circuit to which a signal is inputted from an input terminal;
determining that the signal is in a first state in which the signal repeatedly goes to a high level and a low level alternately when the through current is detected; and
determining that the signal is in a second state in which the signal is kept at one of a high level and a low level when the through current is not detected in a predetermined period of time.
3. The signal detection method according to claim 2 , wherein
the circuit includes a p-type transistor and an n-type transistor with gates to which the signal is inputted.
4. A frequency detection method comprising the steps of:
detecting a through current flowing through a circuit to which a signal is inputted from an input terminal; and
detecting a frequency of the signal, based on the detected through current; wherein
the circuit includes a p-type transistor and an n-type transistor with gates to which the signal is inputted, and includes a transistor to perform a current mirror function.
5. A power consumption control method comprising the steps of:
detecting a through current flowing through a circuit to which a signal outputted from an operation monitoring target is inputted from an input terminal;
determining that the signal is in a first state in which the signal repeatedly goes to a high level and a low level alternately when the through current is detected;
determining that the signal is in a second state in which the signal is kept at one of a high level and a low level when the through current is not detected in a predetermined period of time; and
outputting a power consumption reduction signal when the signal is determined as being in the second state.
6. A signal detecting device comprising a detector for detecting a through current flowing through a circuit to which a signal is inputted from an input terminal, wherein
the signal detecting device detects input of the signal, based on whether or not the through current flowed through the circuit; wherein
the circuit includes a p-type transistor and an n-type transistor with gates to which the signal is inputted, and includes a transistor to perform a current mirror function.
7. A signal detecting device comprising a detector for detecting a through current flowing through a circuit to which a signal is inputted from an input terminal, wherein
the signal detecting device determines that the signal is in a first state in which the signal repeatedly goes to a high level and a low level alternately when the detector detects the through current, and
determines that the signal is in a second state in which the signal is kept at one of a high level and a low level when the detector does not detect the through current in a predetermined period of time.
8. The signal detecting device according to claim 7 , wherein
the circuit includes a p-type transistor and an n-type transistor with gates to which the signal is inputted.
9. A frequency detecting device comprising a detector for detecting a through current flowing through a circuit to which a signal is inputted from an input terminal, wherein
the frequency detecting device detects a frequency of the signal, based on the through current detected by the detector; wherein
the circuit includes a p-type transistor and an n-type transistor with gates to which the signal is inputted, and a transistor to perform a current mirror function.
10. A power consumption control device comprising a detector for detecting a through current flowing through a circuit to which a signal outputted from an operation monitoring target is inputted from an input terminal, wherein
the power consumption control device determines that the signal is in a first state in which the signal repeatedly goes to a high level and a low level alternately when the detector detects the through current,
determines that the signal is in a second state in which the signal is kept at one of a high level and a low level when the detector does not detect the through current in a predetermined period of time, and
outputs a power consumption reduction signal when the signal is determined as being in the second state.
11. An electronic apparatus comprising:
a power consumption control device comprising a detector for detecting a through current flowing through a circuit to which a signal outputted from an operation monitoring target is inputted from an input terminal, wherein the power consumption control device determines that the signal is in a first state in which the signal repeatedly goes to a high level and a low level alternately when the detector detects the through current, determines that the signal is in a second state in which the signal is kept at one of a high level and a low level when the detector does not detect the through current in a predetermined period of time, and outputs a power consumption reduction signal when the signal is determined as being in the second state;
a device as an operation monitoring target, which outputs a signal to the power consumption control device, causes the signal to be in a first state in which the signal repeatedly goes to a high level and a low level alternately when it is operating, and causes the signal to be in a second state in which the signal is kept at one of a high level and a low level when it is not operating; and
a power supply control device for executing one of a power supply stopping process and a power supply reducing process for the operation monitoring target, according to the power consumption reduction signal outputted from the power consumption control device.
12. The signal detection method according to claim 3 , wherein the circuit includes a transistor to perform a current mirror function.
13. The signal detection device of claim 8 , wherein the circuit includes a transistor to perform a current mirror function.