IP Library Granted Patent US 7,256,141
Granted Patent B1
US 7,256,141 · App. 11/135,492 · Granted Aug 14, 2007

Interface layer between dual polycrystalline silicon layers

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,256,141
App. No.
11/135,492
Granted
Aug 14, 2007
Kind
B1
Abstract

A structure interfaces dual polycrystalline silicon layers. The structure includes a first layer of polycrystalline silicon and a metal interface layer formed on a surface of the first layer of polycrystalline silicon. The structure further includes a second layer of polycrystalline silicon formed on a surface of the interface layer.

Claims (30)

1. A method, comprising:

forming a first layer of polycrystalline silicon;

cleaning a surface of the first layer;

forming an interface layer over the surface of the first layer, wherein the interface layer comprises one of titanium, cobalt, or nickel;

forming a second layer of polycrystalline silicon over the interface layer; and

thermal cycling the first layer, interface layer and second layer to form at least one of titanium silicide, cobalt silicide or nickel silicide between at least a portion of the interface layer and portions of the first and second layers.

2. The method of claim 1 , wherein thermal cycling the first layer, interface layer and second layer further comprises:

thermal cycling the first layer, interface layer and second layer to form the at least one of titanium silicide, cobalt silicide and nickel silicide to a thickness ranging from about 50 Å to about 1,000 Å.

3. The method of claim 1 , wherein forming an interface layer comprising:

forming the interface layer to a thickness ranging from about 10 Å to about 500 Å.

4. The method of claim 1 , wherein forming the interface layer comprises:

depositing the titanium, cobalt or nickel over the surface of the first layer.

5. A method of forming an interface between dual polycrystalline silicon layers, comprising:

forming a first layer of polycrystalline silicon;

forming a metal interface layer on the first layer of polycrystalline silicon, wherein the metal interface layer comprises at least one of titanium (Ti), cobalt (Co) or nickel (Ni); and

forming a second layer of polycrystalline silicon on the metal interface layer; and

thermal cycling the first layer, metal interface layer and second layer to form at least one of titanium silicide (TiSi), cobalt silicide (CoSi) or nickel silicide (NiSi) between at least a portion of the metal interface layer and portions of the first and second layers.

6. The method of claim 5 , wherein forming a metal interface layer comprises:

forming the metal interface layer to a thickness ranging from about 10 Å to about 500 Å.

7. The method of claim 5 , wherein forming the metal interface layer comprises:

depositing the titanium, cobalt or nickel over the first layer.

8. The method of claim 5 , further comprising:

cleaning a surface of the first layer prior to forming the interface layer on the first layer.

9. A method, comprising:

forming a first layer of polycrystalline silicon;

forming a metal interface layer on the first layer of polycrystalline silicon;

forming a second layer of polycrystalline silicon on the metal interface layer; and

thermal cycling the first layer, metal interface layer and second layer to form a metal silicide between at least a portion of the metal interface layer and portions of the first and second layers.

10. The method of claim 9 , wherein the metal interface layer comprises a metal, a metal alloy, or a combination of metals or metal alloys.

11. The method of claim 10 , wherein the metal interface layer comprises at least one of titanium (Ti), cobalt (Co) or nickel (Ni).

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2017
From: SPANSION LLC
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 042702/0460 →
RELEASE OF SECURITY INTEREST Recorded May 17, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 042486/0315 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2005
From: RAMSBEY, MARK T.; QIAN, WEIDONG
To: SPANSION LLC
Reel/Frame 016597/0887 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2005
From: CHANG, MARK; PATON, ERIC
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 016597/0871 →