IP Library Granted Patent US 7,329,566
Granted Patent B2
US 7,329,566 · App. 11/142,111 · Granted Feb 12, 2008

Semiconductor device and method of manufacture

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Quick Facts
Patent No.
US 7,329,566
App. No.
11/142,111
Granted
Feb 12, 2008
Kind
B2
Abstract

A semiconductor component and method of manufacture, including an insulated gate bipolar transistor (IGBT) ( 100, 200 ) that includes a semiconductor substrate ( 110 ) having a first conductivity type and buried semiconductor region ( 115 ) having a second conductivity type located above the semiconductor substrate. The IGBT further includes a first semiconductor region ( 120 ) having the first conductivity type located above the buried semiconductor region, a second semiconductor region ( 130 ) having the second conductivity type located above at least a portion of the first semiconductor region, an emitter ( 150 ) having the second conductivity type disposed in the second semiconductor region, and a collector ( 170 ) having the second conductivity type disposed in the first semiconductor region. A sinker region ( 140 ) is provided to electrically tie the buried semiconductor region ( 115 ) to the second semiconductor region ( 130 ). In a particular embodiment, the second semiconductor region and the buried semiconductor region deplete the first semiconductor region in response to a reverse bias potential applied across the semiconductor component.

Claims (14)

1. A method of manufacturing a semiconductor component comprising:

providing a composite substrate comprising a semiconductor epitaxial layer above a semiconductor substrate, the composite substrate having a first conductivity type;

forming a buried semiconductor region in the epitaxial layer, having the second conductivity type;

forming a first semiconductor region in the epitaxial layer, having the first conductivity type and located above the buried semiconductor region;

forming a second semiconductor region in the epitaxial layer having the second conductivity type and located above at least a portion of the first semiconductor region;

disposing a sinker region having the second conductivity above the buried semiconductor region;

disposing an emitter having the second conductivity type in the second semiconductor region, wherein the sinker region electrically ties the buried semiconductor region and the emitter via the second semiconductor region; and

disposing a collector having the second conductivity type in the first semiconductor region,

wherein the second semiconductor region and the buried semiconductor region deplete the first semiconductor region in response to a reverse bias potential applied across the semiconductor component.

2. A method of manufacturing a semiconductor component as claimed in claim 1 wherein the first conductivity type is P-type and the second conductivity type is N-type.

3. A method of manufacturing a semiconductor component as claimed in claim 1 wherein the step of disposing a sinker region above the buried semiconductor region includes disposing the sinker region in the first semiconductor region and the second semiconductor region.

4. A method of manufacturing a semiconductor component as claimed in claim 1 wherein the second semiconductor region and the first semiconductor region form an active area of an IGBT.

5. A method of manufacturing a semiconductor component as claimed in claim 1 wherein the buried semiconductor region is continuous under all of the active area of the IGBT.

6. A method of manufacturing a semiconductor component as claimed in claim 1 further including the step of disposing a buffer region in the first semiconductor region, the buffer region formed to enclose the collector and having the same conductivity type as the collector.

Assignments (18)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0688 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →