IP Library Granted Patent US 7,508,641
Granted Patent B2
US 7,508,641 · App. 11/144,417 · Granted Mar 24, 2009

Method of forming an in-rush limiter and structure therefor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,508,641
App. No.
11/144,417
Granted
Mar 24, 2009
Kind
B2
Abstract

In one embodiment, an in-rush limiter is configured to control an output voltage to increase at a rate that is independent of the load that is powered by the in-rush limiter.

Claims (25)

1. A hot swap in-rush limiter comprising:

a pass transistor configured to couple a voltage from a voltage source to form an output voltage on an output of the hot swap in-rush limiter; and

a control circuit operably coupled to form a linearly varying reference signal and responsively control the pass transistor to linearly increase the output voltage at a rate that is independent of a current supplied through the pass transistor to a load, the control circuit including a ramp generator coupled to generate the linearly varying reference signal as a ramp signal that increases linearly with time, an amplifier coupled to receive a sense signal representative of the output voltage and compare the sense signal to the ramp signal, and a control transistor coupled to receive an output of the amplifier and control the pass transistor to increase the output voltage responsively to the ramp signal.

2. The hot swap in-rush limiter of claim 1 further including a charge pump circuit coupled to provide a drive voltage for the pass transistor.

3. The hot swap in-rush limiter of claim 1 wherein the hot swap in-rush limiter is formed on a single semiconductor substrate and wherein the control circuit is configured to use a capacitor that is external to the single semiconductor substrate to form the linearly varying reference signal.

4. The hot swap in-rush limiter of claim 1 wherein the voltage from the voltage source is a dc voltage.

5. The hot swap in-rush limiter of claim 1 wherein the control circuit operably coupled to form the linearly varying reference signal and responsively control the pass transistor to linearly increase the output voltage includes the control circuit operably coupled to control the pass transistor to linearly increase the output voltage responsively to receiving the voltage from the voltage source.

6. The hot swap in-rush limiter of claim 1 wherein the

control transistor has a first current carrying electrode coupled to a control electrode of the pass transistor, a second current carrying electrode coupled to a voltage return, and a control electrode;

the ramp generator has an output configured to generate a linearly increasing reference signal; and

the amplifier has a first input coupled to receive the reference signal, a second input coupled to receive the sense signal, and an output coupled to provide an output of the amplifier to the control electrode of the control transistor.

7. A method of forming a hot swap in-rush limiter comprising:

configuring a pass transistor to couple a voltage from a voltage source to form an output voltage on an output of the hot swap in-rush limiter;

configuring a ramp circuit to form a ramp signal; and

configuring the hot swap in-rush limiter to use the ramp signal to form a control signal to control the pass transistor wherein the control signal varies responsively to the ramp signal and the output voltage at a rate that is independent of the current flow through the pass transistor and wherein the pass transistor controls the output voltage to increase with time at a rate that is independent of a load connected to receive the output voltage and wherein the hot swap in-rush limiter is configured to limit a rate of increase of the output voltage to no greater than a rate of increase of the ramp signal.

8. The method of claim 7 wherein configuring the hot swap in-rush limiter to use the ramp signal includes configuring the pass transistor to linearly increase an amount of an input voltage that the pass transistor couples to the output voltage.

9. The method of claim 8 further including configuring the hot swap in-rush limiter to increase the amount of the input voltage that the pass transistor couples to the output voltage responsively to the ramp signal.

10. The method of claim 8 wherein configuring the pass transistor to use the ramp signal includes configuring the pass transistor to linearly increase the amount of the input voltage that the pass transistor couples to the output voltage responsively to receiving the input voltage.

11. A hot swap method comprising:

coupling a pass transistor to couple a voltage from a voltage source to an output of an in-rush limiter in order to form an output voltage;

configuring the in-rush limiter to form a ramp signal that is independent of a load current through the pass transistor;

configuring the in-rush limiter to form a control signal that is representative of a difference between the ramp signal and a sense signal wherein the sense signal is representative of the output voltage and wherein a value of the control signal is independent of a value of the load current through the pass transistor;

configuring the in-rush limiter to control the pass transistor responsively to the difference between the ramp signal and the sense signal and to increase the output voltage at a rate that is independent of the load current through the pass transistor including limiting a rate of increase of the output voltage to no greater than a rate of increase of the ramp signal.

12. The method of claim 11 wherein configuring the in-rush limiter to control the pass transistor responsively to the difference between the ramp signal and the sense signal includes coupling an amplifier to receive the sense signal and the ramp signal and to form the control signal that limits the rate of increase of the output voltage.

13. The method of claim 12 including using an output of the amplifier to control the pass transistor to couple the voltage from the voltage source to the output voltage responsively to the control signal.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →