IP Library Granted Patent US 7,588,867
Granted Patent B2
US 7,588,867 · App. 11/158,271 · Granted Sep 15, 2009

Reflection mask, use of the reflection mask and method for fabricating the reflection mask

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Quick Facts
Patent No.
US 7,588,867
App. No.
11/158,271
Granted
Sep 15, 2009
Kind
B2
Abstract

A reflection mask that includes a structure ( 20 ) for lithographically transferring a layout onto a target substrate, in particular for use in EUV lithography, and a reflective multilayer structure ( 11 ). At least one flare reduction layer ( 13′, 17 ) is at least partly arranged on a bright field of the multilayer structure ( 11 ).

Claims (40)

1. A reflection mask comprising:

a substrate;

a structure over the substrate, the structure shaped to generate a pattern onto a target substrate;

a reflective multilayer structure over the substrate; and

at least one flare reduction layer arranged at least partly on a bright field of the multilayer structure, wherein a spacing is present between the flare reduction layer and the structure,

and wherein the flare reduction layer has a thickness of at least 10 nm.

2. The reflection mask according to claim 1 , wherein the at least one flare reduction layer is spaced around the structure by a predetermined spacing distance.

3. The reflection mask according to claim 1 , wherein the structure comprises a buffer layer and wherein the least one flare reduction layer is formed from the same layer as the buffer layer.

4. The reflection mask according to claim 1 , wherein the at least one flare reduction layer is arranged as a layer on or under a capping layer or an etching stop layer.

5. The reflection mask according to claim 1 , wherein the at least one flare reduction layer comprises SiO 2 .

6. The reflection mask according to claim 1 , wherein the at least one flare reduction layer has a layer thickness of between about 10 nm and about 30 nm.

7. The reflection mask according to claim 1 , wherein the structure comprises an absorber layer made of TaN or chromium.

8. The reflection mask according to claim 1 , wherein the structure comprises a buffer layer, the buffer layer comprising SiO 2 or chromium,

9. The reflection mask according to claim 1 , wherein the structure comprises a buffer layer and an absorber layer, the buffer layer comprising SiO 2 and the absorber layer comprising chromium.

10. The reflection mask according to claim 1 , wherein the reflective multilayer structure comprises a structure that is reflective of extreme ultraviolet light.

11. A method of manufacturing a semiconductor device, the method comprising:

providing a reflection mask, the reflection mask comprising a substrate, an absorber structure over the substrate, a reflective multilayer structure over the substrate, and at least one flare reduction layer arranged at least partly on a bright field of the multilayer structure, the flare reduction layer having a thickness of at least 10 nm, wherein a spacing is present between the flare reduction layer and the absorber structure;

providing a semiconductor wafer coated with a resist;

reflecting radiation from the reflection mask onto the resist;

removing a portion of the resist; and

modifying the semiconductor wafer at portions exposed by the removed resist.

12. The method of claim 11 , wherein modifying the semiconductor wafer comprises performing a step in the fabrication of a dynamic random access memory.

13. The method of claim 11 , wherein reflecting radiation comprises reflecting extreme ultraviolet radiation.

14. The method of claim 11 , wherein reflecting radiation comprises reflecting radiation having a wavelength of about 13.5 nm.

15. A method for fabricating a reflection mask, the method comprising:

forming a reflective multilayer structure over a substrate;

forming a capping layer over the multilayer structure;

forming a buffer layer over the capping layer;

forming an absorber layer over the buffer layer;

patterning the absorber layer;

patterning the buffer layer such that a portion of the buffer layer remains beneath the patterned absorber layer; and

forming a flare reduction layer over the capping layer and spaced from the portion of the buffer layer beneath the patterned absorber layer such that a spacing is present between the flare reduction layer and the patterned absorber layer, the flare reduction layer having a thickness of at least 10 nm.

16. The method of claim 15 , wherein patterning the buffer layer and forming the flare reduction layer are performed simultaneously by patterning the buffer layer such that a first portion of the buffer layer remains beneath the patterned absorber layer and a second portion of the buffer layer remains over the capping layer and spaced from the first portion of the buffer layer by a distance.

17. The method of claim 16 , wherein forming a buffer layer comprises depositing an oxide layer.

18. The method of claim 15 , wherein forming the flare reduction layer comprises:

forming a separate flare reduction layer above the multilayer structure after patterning the buffer layer; and

patterning the separate flare reduction layer to form the flare reduction layer.

19. The method of claim 18 , further comprising forming an etch stop layer before forming the separate flare reduction layer.

20. The method of claim 15 , wherein the absorber layer is formed from a material that will absorb radiation in the extreme ultraviolet range.

21. The reflection mask according to claim 1 , further comprising a capping layer beneath the flare reduction layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036888/0745 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023806/0001 →