IP Library Granted Patent US 7,332,414
Granted Patent B2
US 7,332,414 · App. 11/159,553 · Granted Feb 19, 2008

Chemical die singulation technique

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Quick Facts
Patent No.
US 7,332,414
App. No.
11/159,553
Granted
Feb 19, 2008
Kind
B2
Abstract

A method is provided for manufacturing a semiconductor device from a substrate ( 200 ) having an active surface ( 204 ) and a non-active surface ( 206 ). The method comprises depositing a backing material ( 104 ) onto the non-active surface of the substrate ( 206 ) in a pattern ( 500 ), the pattern ( 500 ) having at least a first die section ( 210 ), a second die section ( 212 ) adjacent the first die section ( 210 ), and a strip ( 216 ) connecting the first die section ( 210 ) and the second die section ( 212 ), removing material from portions of the non-active surface of the substrate ( 206 ) on which the backing material ( 104 ) is not deposited to thereby partially separate the substrate ( 200 ) into a first die ( 236 ) and a second die ( 238 ) connected to one another by the strip ( 254 ) of the deposited backing material, and breaking the strip connector ( 254 ) to separate the first die ( 236 ) from the second die ( 238 ).

Claims (36)

1. A method for manufacturing a semiconductor device from a substrate having an active surface and a non-active surface, the method comprising:

depositing a backing material onto the non-active surface of the substrate in a pattern, the pattern having at least a first die section, a second die section adjacent the first die section, and a strip connecting the first die section and the second die section;

removing material from portions of the non-active surface of the substrate on which the backing material is not deposited to thereby partially separate the substrate into a first die and a second die connected to one another by the strip of the deposited backing material; and

breaking the strip connector to separate the first die from the second die.

2. The method of claim 1 , wherein the step of depositing comprises:

placing a shadow mask having an outline of the pattern formed therein over the non-active surface of the substrate; and

depositing the backing material over the shadow mask and the non-active surface of the substrate to thereby form the pattern on the substrate.

3. The method of claim 1 , wherein the step of depositing comprises depositing a metal.

4. The method of claim 1 , wherein the step of depositing comprises depositing a non-metal.

5. The method of claim 1 , wherein the step of depositing comprises:

depositing the backing material over the non-active surface of the substrate;

depositing photoresist in the pattern over the deposited backing material, wherein at least a portion of the deposited backing material is exposed; and etching the exposed backing material.

6. The method of claim 1 , wherein the first die section is circular.

7. The method of claim 1 , wherein the first die section is polygonal having corners that are rounded or sharp.

8. The method of claim 1 , further comprising: bonding a handle wafer to the active surface of the substrate.

9. The method of claim 8 , further comprising: reducing a thickness of the substrate, after the step of bonding the active surface of the substrate to a handle wafer.

10. The method of claim 9 , further comprising:

removing the substrate from the handle wafer; and

coupling the substrate to adhesive tape after the step of removing.

11. The method of claim 1 , further comprising:

coupling the substrate to adhesive tape, after the step of removing material from portions of the non-active surface of the substrate on which the backing material is not deposited.

12. The method of claim 1 , wherein the step of removing material from portions of the non-active surface of the substrate on which the backing material is not deposited comprises etching the substrate.

13. The method of claim 12 , wherein the step of etching the substrate comprises using a dry etching process on the substrate.

14. The method of claim 12 , wherein the step of etching the substrate comprises using a wet etching process on the substrate.

15. The method of claim 1 , wherein the step of breaking the strip connector comprises sawing the strip connector.

16. A method for manufacturing a die from a substrate, the method comprising:

bonding a handle wafer to an active surface of the substrate;

reducing a thickness of a non-active surface of the substrate;

depositing a backing material in a pattern onto the non-active surface of the substrate, the pattern having at least a first die section, a second die section adjacent the first die section, and a strip connecting the first die section to the second die section;

chemically removing a portion of the non-active surface of the substrate on which backing material is not deposited to partially separate the substrate into a first die and a second die connected to one another by the strip of the deposited backing material;

removing the handle wafer from the substrate;

coupling the deposited backing material to adhesive tape; and

breaking the strip to detach the first die from the second die.

17. The method of claim 16 , wherein the step of chemically removing includes the step of etching the exposed portion of the substrate.

18. The method of claim 16 , wherein the first die section is circular.

19. The method of claim 16 , wherein the first die section is polygonal having corners that are rounded or sharp.

Assignments (23)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0688 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Jul 7, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021194/0593 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2005
From: CONDIE, BRIAN W.; DOUGHERTY, DAVID J.; SHAH, MAHESH K.
To: FREESCALE SEMICONDUCTOR, INC.
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