Substrate based IC-package
View Patent ↗A semiconductor component comprises a substrate that includes wiring on a first surface. A chip is mounted on a second surface of the substrate by a die attach, the second surface opposite the first surface. A bond channel in the center of the substrate allows for electrical connection of contact pads on the wiring with bond pads arranged in a center row on the chip by wire loops. A housing made of a mold compound surrounds a backside of the chip and parts of the substrate adjacent to the wiring. The semiconductor component further comprises a rigid prepreg layer covering, as well as the wiring of the substrate and the prepreg layer being provided with openings. Each opening is arranged in such a manner that the contact pads are accessible, and solder balls are mounted on each of the contact pads through the openings.
1. A semiconductor component, comprising:
a substrate that includes a wiring on a first surface;
a chip mounted on a second surface of the substrate by a die attach, the second surface opposite the first surface;
a bond channel in the center of the substrate to allow for electrical connection of contact pads on the wiring with bond pads arranged in a center row on the chip by wire loops;
a housing made of a mold compound surrounding a backside of the chip and parts of the substrate adjacent to the wiring;
a rigid prepreg layer covering
the wiring of the substrate, the prepreg layer being provided with openings, each opening arranged in such a manner that the contact pads are accessible; and
solder balls mounted on each of the contact pads through the openings.
2. The semiconductor component according to claim 1 , wherein each opening has a v-shaped cross section.
3. The semiconductor component according to claim 1 , wherein the openings each have a first diameter and the contact pads each have a second diameter and wherein the first diameter is smaller than the second diameter.
4. The semiconductor component according to claim 1 , wherein each opening has a circular circumference.
5. The semiconductor component according to claim 1 , wherein each opening has an angular circumference.
6. The semiconductor component according to claim 1 , wherein the prepreg layer is attached to the substrate by laminating.
7. The semiconductor component according to claim 6 , wherein the prepreg layer is formed from the same material as the substrate.
8. The semiconductor component according to claim 7 , wherein the prepreg layer is formed from glass fibre fixed with an epoxy resist.
9. The semiconductor component according to claim 1 , further comprising a second prepreg layer covering the second surface of the substrate.
10. The semiconductor component according to claim 9 , wherein the second prepreg layer is laminated on the second surface of the substrate.
11. A semiconductor component, comprising:
a substrate provided with a first wiring on a first surface and a second wiring on a second surface;
at least one chip mounted on the first surface of the substrate, the chip being electrically and mechanically connected with contact pads on the second surface on the wiring by flip-chip bonding, and
a housing made of a mold compound surrounding the backside of the chip and parts of the substrate adjacent to the wiring;
a first prepreg layer covering the first wiring on the first surface of the substrate;
a second prepreg layer covering the second wiring on the second surface of the substrate wherein the second prepreg layer is provided with openings, each opening arranged in such a manner that the contact pads on the second surface are freely accessible; and
solder balls mounted on each of the contact pads on the first surface through the openings.
12. The semiconductor component according to claim 11 , wherein each opening has a v-shaped cross section.
13. The semiconductor component according to claim 11 , wherein a diameter of the openings is smaller than a diameter of the contact pads.
14. The semiconductor component according to claim 11 , wherein each opening has a circular circumference.
15. The semiconductor component according to claim 11 , wherein each opening has an angular circumference.
16. The semiconductor component according to claim 11 , wherein the first prepreg layer and the second prepreg layer are attached to the substrate by laminating.
17. The semiconductor component according to claim 16 , wherein the prepreg layer is formed from the same material as the substrate.
18. The semiconductor component according to claim 17 , wherein the first and second prepreg layers are formed from glass fibre fixed with an epoxy resist.
19. The semiconductor component according to claim 11 , wherein the at least one chip comprises a stack of chips mounted on the substrate, the component further including a redistribution layer between each of the chips.
20. The semiconductor component according to claim 19 , wherein each of the chips comprises a memory chip.