IP Library Granted Patent US 7,423,281
Granted Patent B2
US 7,423,281 · App. 11/234,375 · Granted Sep 9, 2008

Microelectronic device with a plurality of storage elements in serial connection and method of producing the same

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Quick Facts
Patent No.
US 7,423,281
App. No.
11/234,375
Granted
Sep 9, 2008
Kind
B2
Abstract

The micro electronic device comprises a substrate with a surface and a plurality of storage elements in serial connection formed at the surface of the substrate, a plurality of transistors, each transistor being connected parallel to one of the plurality of storage elements. Each storage element comprises a storing material between a first electrode and a second electrode. A storing material provides at least two different storing states with different electrical properties. The first electrode comprises a first material and the second electrode comprises a second material different from the first material. The plurality of storage elements is oriented parallel to the surface of the substrate.

Claims (51)

1. A microelectronic device, comprising:

a substrate with an upper surface;

a plurality of storage elements in serial connection formed at the upper surface of the substrate, each storage element comprising a storing material layer between a first electrode layer and a second electrode layer, the storing material layer providing at least two different storing states with different electrical properties, the first electrode layer comprising a first material and the second electrode layer comprising a second material different from the first material; and

a plurality of transistors, each transistor being connected parallel to one of the plurality of storage elements,

wherein the first electrode layer, the storing material layer, and the second electrode layer of each of the plurality of storage elements are arranged laterally along a same plane that is oriented parallel to the upper surface of the substrate.

2. The microelectronic device according to claim 1 , wherein interfaces between the first and second electrode layers and the storing material layer are perpendicular to the upper surface of the substrate.

3. The microelectronic device according to claim 2 , wherein the second electrode layer of a first storage element out of the plurality of storage elements adjoins the first electrode layer of a second storage element out of the plurality of storage elements.

4. The microelectronic device according to claim 3 , wherein

the first electrode layer of the second storage element has a backside opposite to the interface between the first electrode layer of the second storage element and the storing material layer of the second storage element, and

the material of the second electrode layer of the first storage element is deposited on the backside of the first electrode layer of the second storage element.

5. The microelectronic device according to claim 4 , further comprising:

an insulating layer positioned between the storing material layer of each storage element and the upper surface of the substrate;

through holes in the insulating layer; and

vertical through hole conductors, each through hole conductor being positioned in one of the through holes,

wherein the first electrode layer of each of the plurality of storage elements is one end of one of the vertical through hole conductors the other end of which is electrically conductively connected to a source/drain region under the upper surface of the substrate.

6. The microelectronic device according to claim 5 , further comprising:

word lines oriented parallel to the upper surface of the substrate and perpendicular to the storage elements;

active areas under the upper surface of the substrate, each active area being positioned between a pair of through hole conductors connected to the same storage element; and

an insulating layer between the active areas and the word lines,

wherein the electrical conductivities of the active areas can be switched by the application of predefined voltages to the word lines.

7. The microelectronic device according to claim 1 , wherein the memory device is a non-volatile memory device.

8. The microelectronic device according to claim 1 , wherein

the storing material layer is of a resistive material, and

the at least two different storing states of the storing material layer are resistive states with different resistive values.

9. A microelectronic device, comprising:

a substrate with an upper surface;

a plurality of resistive storage elements in serial connection formed at the upper surface of the substrate, each resistive storage element comprising a resistive material layer between two electrode layers, the resistive material layer providing at least two different resistive states with different electrical resistance values; and

a plurality of transistors, each transistor being connected parallel to one of the plurality of resistive storage elements,

wherein the resistive material layer and the two electrode layers of each of the plurality of resistive storage elements are arranged laterally along a same plane that is oriented parallel to the surface of the substrate.

10. The microelectronic device according to claim 9 , wherein

each resistive storage element comprises a resistive storing material layer between a first electrode layer and a second electrode layer, and

the first electrode layer comprises a first material and the second electrode layer comprises a second material different from the first material.

11. The microelectronic device according to claim 10 , wherein the second electrode layer of a first resistive storage element out of the plurality of resistive storage elements adjoins the first electrode layer of a second resistive storage element out of the plurality of resistive storage elements.

12. The microelectronic device according to claim 11 , wherein interfaces between the first and second electrodes layers and the resistive storing material layer are perpendicular to the upper surface of the substrate.

13. The microelectronic device according to claim 12 , wherein

the first electrode layer of the second resistive storage element has a backside opposite to the interface between the first electrode layer of the second resistive storage element and the resistive storing material layer of the resistive second storage element, and

the material of the second electrode layer of the first resistive storage element is deposited on the backside of the first electrode layer of the second resistive storage element.

14. The microelectronic device according to claim 13 , further comprising:

an insulating layer positioned between the resistive storing material layer of each resistive storage element and the upper surface of the substrate;

through holes in the insulating layer; and

vertical through hole conductors, each through hole conductor being positioned in one of the through holes,

wherein the first electrode layer of each of the plurality of resistive storage elements is one end of one of the vertical through hole conductors, the other end of which is electrically conductively connected to a source/drain region under the upper surface of the substrate.

15. The microelectronic device according to claim 14 , further comprising:

word lines oriented parallel to the upper surface of the substrate and perpendicular to the resistive storage elements;

active areas under the upper surface of the substrate, each active area being positioned between a pair of through hole conductors connected to the same storage element; and

an insulating layer between the active areas and the word lines,

wherein the electrical conductivities of the active areas can be switched by the application of predefined voltages to the word lines.

16. The microelectronic device according to claim 9 , wherein the memory device is a non-volatile memory device.

17. A microelectronic device, comprising:

a substrate with an upper surface; and

a storage element comprising a storing material layer between a first electrode layer and a second electrode layer, the storing material layer providing at least two different storing states with different electrical properties, the first electrode layer comprising a first material and the second electrode layer comprising a second material different from the first material, wherein the first electrode layer, the storing material layer, and the second electrode layer of the storage element are arranged laterally along a same plane that is oriented parallel to the upper surface of the substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036701/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023773/0001 →