IP Library Granted Patent US 7,405,446
Granted Patent B2
US 7,405,446 · App. 11/236,967 · Granted Jul 29, 2008

Electrostatic protection systems and methods

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Quick Facts
Patent No.
US 7,405,446
App. No.
11/236,967
Granted
Jul 29, 2008
Kind
B2
Abstract

Systems and methods are disclosed herein to provide improved electrostatic protection for electrical circuits. For example, in accordance with an embodiment of the present invention, an electrostatic protection device includes: a drain region formed in a substrate; a gate separated from the substrate by a gate oxide; and an isolation region formed in the substrate, the isolation region being adapted to isolate the gate oxide from a DC voltage coupled to the drain region.

Claims (19)

1. An electrostatic protection device comprising:

a drain region formed in a substrate;

a gate separated from the substrate by a gate oxide; and

a shallow trench isolation region formed in the substrate and adjacent to the drain region, the isolation region being adapted to isolate the gate oxide from a DC voltage coupled to the drain region, wherein the isolation region does not extend under the gate.

2. The electrostatic protection device of claim 1 , wherein the drain region is at least as deep as the isolation region.

3. The electrostatic protection device of claim 1 , wherein the drain region is formed using a high dose implant.

4. The electrostatic protection device of claim 1 , wherein the electrostatic protection device is adapted to enter a snapback operation in response to coupling a source of electrostatic voltage to the drain region.

5. The electrostatic protection device of claim 1 , wherein:

the electrostatic protection device is adapted to enter a snapback operation in response to coupling a source of electrostatic voltage to the drain region; and

the gate is adapted to receive a control voltage to adjust a trigger voltage associated with the snapback operation.

6. The electrostatic protection device of claim 1 , wherein drain region comprises n-type material, and the substrate comprises p-type material.

7. The electrostatic protection device of claim 1 , wherein the drain region is coupled to a pad of an integrated circuit.

8. The electrostatic protection device of claim 1 , wherein the electrostatic protection device is provided in an integrated circuit.

9. The electrostatic protection device of claim 1 , wherein the electrostatic protection device is a transistor.

10. An electrostatic protection device comprising:

a drain region formed in a substrate;

a gate separated from the substrate by a gate oxide; and

a shallow trench isolation region formed in the substrate and adjacent to the drain region, the isolation region being adapted to isolate the gate oxide from a DC voltage coupled to the drain region, wherein the isolation region does not extend under the gate and is between the drain region and the gate oxide.

11. The electrostatic protection device of claim 10 , wherein the isolation region extends between the drain region and the gate oxide.

Assignments (3)
SECURITY INTEREST Recorded May 21, 2019
From: LATTICE SEMICONDUCTOR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 049980/0786 →
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
SECURITY INTEREST Recorded Mar 18, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035223/0001 →