IP Library Granted Patent US 7,462,550
Granted Patent B2
US 7,462,550 · App. 11/256,409 · Granted Dec 9, 2008

Method of forming a trench semiconductor device and structure therefor

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Quick Facts
Patent No.
US 7,462,550
App. No.
11/256,409
Granted
Dec 9, 2008
Kind
B2
Abstract

In one embodiment, a trench semiconductor device is formed to have an oxide of a first thickness along the sidewalls of the trench, and to have a greater thickness along at least a portion of a bottom of the trench.

Claims (35)

1. A method of forming a trench semiconductor device comprising:

providing a semiconductor substrate having a first surface;

forming a first opening from the first surface into the semiconductor substrate wherein the first opening has sidewalls and a bottom;

forming a first silicon dioxide layer on the sidewalls and on the bottom of the first opening to a first thickness;

forming a semiconductor material on at least a first portion of the first silicon dioxide layer that is on the sidewalls;

increasing the first thickness of a portion of the first silicon dioxide layer along the bottom to a second thickness without substantially increasing the first thickness of the first silicon dioxide layer on the sidewalls wherein the second thickness is greater than the first thickness; and

leaving at least a portion of the semiconductor material on the first portion of the silicon dioxide.

2. The method of claim 1 wherein forming the first opening includes forming a second silicon dioxide layer on the first surface, forming a protection layer on the second silicon dioxide layer, and forming the first opening through the protection layer and through the second silicon dioxide layer.

3. The method of claim 2 wherein forming the first portion of the sidewalls includes undercutting the protection layer a first distance with a portion of the sidewalls extending to underlie the protection layer.

4. The method of claim 1 wherein forming the first silicon dioxide layer on the sidewalls and on the bottom of the first opening includes oxidizing the sidewalls and the bottom to form the first silicon dioxide layer to the first thickness.

5. The method of claim 4 wherein increasing the first thickness of the portion of the first silicon dioxide layer on the bottom to the second thickness includes subsequently oxidizing the portion of the first silicon dioxide layer on the bottom to form the second thickness without oxidizing the first silicon dioxide layer on the sidewalls and without oxidizing the semiconductor material.

6. The method of claim 4 wherein increasing the first thickness of the portion of the first silicon dioxide layer on the bottom to the second thickness includes forming a protection layer overlying the first silicon dioxide layer and the semiconductor material, removing a portion of the protection layer in the bottom of the first opening and overlying the portion of the first silicon dioxide layer along the bottom but not removing the protection layer that is overlying the first silicon dioxide layer that is on the sidewalls and that is also overlying the semiconductor material, and subsequently oxidizing the portion of the first silicon dioxide layer along the bottom.

7. The method of claim 6 wherein forming the protection layer overlying the first silicon dioxide layer includes forming a silicon nitride layer overlying the first silicon dioxide layer.

8. The method of claim 6 further including forming the semiconductor material as a polysilicon layer on the first silicon dioxide layer and forming the protection layer on the polysilicon layer.

9. The method of claim 1 further including forming a protective layer overlying the first silicon dioxide layer and the semiconductor material, and removing a portion of the protective layer that is overlying the bottom of the opening prior to the step of increasing the first thickness.

10. The method of claim 9 wherein forming the semiconductor material includes forming polysilicon on at least the first portion of the first silicon dioxide layer.

11. A method of forming a trench semiconductor device comprising:

providing a semiconductor substrate having a first surface;

forming a first opening from the first surface into the semiconductor substrate wherein the first opening has sidewalls and a bottom;

forming a first silicon dioxide layer on the sidewalls and on the bottom to a first thickness;

forming a first polysilicon layer on the first silicon dioxide layer on the sidewalls but not on at least a first portion of the first silicon dioxide layer that is on the bottom; and

increasing the first thickness of the first portion of the first silicon dioxide layer to a second thickness without substantially increasing the first thickness of the first silicon dioxide layer on the sidewalls wherein the second thickness is greater than the first thickness.

12. The method of claim 11 wherein forming the first silicon dioxide layer on the sidewalls includes forming a second portion of the first silicon dioxide layer near an intersection with the first surface to have a curved shape.

13. The method of claim 12 wherein forming the first opening from the first surface into the semiconductor substrate includes forming a portion of the sidewalls of the first opening to have substantially the curved shape near the first surface.

14. The method of claim 12 wherein increasing the first thickness of the first portion of the first silicon dioxide layer to the second thickness includes forming a protection layer on the first polysilicon layer that is on the sidewalls including on the first polysilicon layer overlying the curved shape, removing a portion of the first polysilicon layer that is on the bottom to expose the first portion of the first silicon dioxide layer, and oxidizing the first portion of the first silicon dioxide layer without oxidizing the first silicon dioxide layer on the sidewalls including on the curved shape.

15. The method of claim 11 wherein forming the first opening from the first surface into the semiconductor substrate includes forming a second silicon dioxide layer on the first surface, forming a protection layer on the second silicon dioxide layer, and forming the first opening through the protection layer and through the second silicon dioxide layer and undercutting the protection layer a first distance to form a portion of the sidewalls with a curved shape.

16. The method of claim 15 wherein undercutting the protection layer the first distance includes removing a portion of the semiconductor substrate near an intersection of the sidewalls and the first surface.

17. The method of claim 15 wherein forming the first silicon dioxide layer on the sidewalls includes forming the first silicon dioxide layer on the sidewalls including on the portion having the curved shape.

18. The method of claim 11 wherein forming the first silicon dioxide layer on the sidewalls includes forming a second portion of the first silicon dioxide layer near an intersection with the first surface to form an angle greater than ninety degrees with the first surface.

19. A trench semiconductor device comprising:

a semiconductor substrate having a first surface;

an opening extending into the semiconductor substrate from the first surface, the opening having sidewalls and a bottom;

a first silicon dioxide layer formed to a first thickness on sidewalls of the opening and formed to a second thickness on the bottom of the opening wherein the second thickness is greater than the first thickness, a first portion of the first silicon dioxide layer that is adjacent to the first surface forming a non-orthogonal angle with the plane of the first surface; and

a polysilicon layer on the first portion of the silicon dioxide layer wherein the polysilicon layer has a sidewall that forms an angle of approximately ninety degrees with the plane of the first surface and wherein the sidewall of the polysilicon layer is substantially parallel to a second portion of the silicon dioxide layer that is away from the first surface and that does not intersect the plane of the first surface.

20. The trench semiconductor device of claim 19 wherein the first portion of the first silicon dioxide layer has substantially the first thickness.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →