Diagnostic circuit and method therefor
View Patent ↗In one embodiment, a diagnostic circuit is used to test the on-resistance of a transistor.
1. A diagnostic circuit for testing a transistor comprising:
a forward bias detection circuit operably coupled to determine a forward biased state of a transistor; and
a first circuit operably coupled to form a first signal representative of a drain-to-source voltage of the transistor, to form a second signal representative of a drain current of the transistor, and to responsively indicate that an on-resistance of the transistor is less than a first value wherein the transistor and the first circuit are formed on a common semiconductor die.
2. A diagnostic circuit for testing a transistor comprising:
a forward bias detection circuit operably coupled to determine a forward biased state of a transistor; and
a first circuit operably coupled to form a first signal representative of a drain-to-source voltage of the transistor, to form a second signal representative of a drain current of the transistor, and to responsively indicate that an on-resistance of the transistor is less than a first value wherein the first circuit is configured to compare the second signal to the first signal and responsively form a third signal having a value that indicates the on-resistance is greater than the first value.
3. The diagnostic circuit of claim 2 wherein the first circuit is configured to form the first signal with external power applied to a source and drain of the transistor from a power source external to the diagnostic circuit.
4. The diagnostic circuit of claim 2 wherein the forward bias detection circuit is configured to received the drain-to-source voltage of the transistor and responsively form a third signal indicating the forward biased state of the transistor.
5. The diagnostic circuit of claim 2 wherein the first circuit is configured to form the second signal to have a greater amplitude than the first signal for an on-resistance less than the first value.
6. The diagnostic circuit of claim 2 further including a reverse bias detection circuit configured to determine a reversed biased state of the transistor.
7. The diagnostic circuit of claim 6 wherein the reverse bias detection circuit is coupled to form a third signal representative of the drain-to-source voltage of the transistor and compare the third signal to a reference value.
8. The diagnostic circuit of claim 2 wherein the transistor and the diagnostic circuit are form on a common semiconductor substrate.