Device for minimizing differential pair length mismatch and impedance discontinuities in an integrated circuit package design
View Patent ↗A method of routing an integrated circuit package design includes steps of receiving as input at least a portion of an integrated circuit design including a differential pair of two electrical conductors, calculating a value of length mismatch between the two electrical conductors, calculating an added trace length to compensate for an impedance discontinuity of a shorter one of the two electrical conductors, and extending the shorter one of the two electrical conductors by routing the added trace length entirely inside an area surrounded by a contact pad that electrically terminates the shorter one of the two electrical conductors. The routing for the differential pair with the added trace length is generated as output in the integrated circuit design.
1. An integrated circuit package comprises:
a differential pair of two electrical conductors; and
an added trace length that extends a shorter one of the two electrical conductors by routing the added trace length entirely inside an area surrounded by a contact pad that electrically terminates the shorter one of the two electrical conductors to compensate for an impedance discontinuity of the shorter one of the two electrical conductors.
2. The integrated circuit package of claim 1 further comprising an extension of the added trace length outside the area surrounded by the contact pad to compensate for a length mismatch between the two electrical conductors.
3. The integrated circuit package of claim 1 further comprising an adjustment of the added trace length to result in maximum signal symmetry for the differential pair.