IP Library Granted Patent US 7,197,043
Granted Patent B2
US 7,197,043 · App. 11/278,901 · Granted Mar 27, 2007

Method for allocating memory space for limited packet head and/or tail growth

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Quick Facts
Patent No.
US 7,197,043
App. No.
11/278,901
Granted
Mar 27, 2007
Kind
B2
Abstract

A hardware/software system is provided for allocating memory in the form of a buffer zone surrounding a data packet to be stored in the memory. The hardware/software system comprises, first and second registers for storing separate values representing in one register, an amount of memory preceding the first line of the data packet to be stored and in the other the amount succeeding the last line of the packet to be stored, a hardware mechanism for allocating the memory according to computational results computed using the register values and the size of a data packet to be stored, and software for processing stored data packet and for writing any new growth data into the designated buffer zones surrounding the data packet.

Claims (47)

1. A processor for storing and downloading data packets, the processor comprising:

a memory configured to store data packets; and

circuitry configured to:

allocate a portion of memory for storing a data packet, wherein a size of the portion of memory is determined by adding a first value to a size of the data packet; and

store the data packet within the portion of memory between a first unoccupied sub-portion and a second unoccupied sub-portion of the portion of memory.

2. The processor of claim 1 , wherein the circuitry is further configured to determine the size of the data packet.

3. The processor of claim 2 , wherein the circuitry is further configured to:

determine the size of the portion of memory to be allocated; and

allocate the portion of memory for storing the data packet.

4. The processor of claim 2 , wherein the circuitry is operable to execute software configured to allocate the portion of memory for storing the data packet; and wherein the circuitry is configured to determine the size of the portion of memory to be allocated and pass a value representing the size of the portion of memory to be allocated to the software.

5. The processor of claim 2 , wherein the circuitry is configured to:

add said first value to a size of the data packet in further response to determining the data packet is of a first type; and

add a second value to the size of the data packet, in response to determining the data packet is of a second type, wherein the second value is different from the first value.

6. The processor of claim 1 , wherein the processor is further configured to add data to the stored data packet without moving the stored data packet in memory, wherein data added to the data packet is stored in the first and/or the second unoccupied sub-portions of the portion of memory.

7. The processor of claim 1 , wherein the circuitry is further configured to change the first value during operation of the processor.

8. The processor of claim 1 , wherein the circuitry is further configured to track changes in packet size during processing and use the tracked changes to determine a starting point of a packet in memory before download of the packet.

9. The processor of claim 1 , wherein the circuitry is further configured to:

determine that data is to be added to a stored data packet which is stored in an allocated memory location; and

move the stored data packet to a different memory location in response to detecting said allocated memory location cannot accommodate both said stored data packet and the data to be added.

10. The processor of claim 9 , wherein the size of data to be added is greater than a size of the first unoccupied sub-portion.

11. The processor of claim 9 , wherein the size of data to be added is greater than the size of the second unoccupied sub-portion.

12. A method for storing and downloading data packets, the method comprising:

allocating a portion of memory for storing a data packet, wherein a size of the portion of memory is determined by adding a first value to a size of the data packet; and

storing the data packet within the portion of memory between a first unoccupied sub-portion and a second unoccupied sub-portion of the portion of memory.

13. The method of claim 12 further comprising determining the size of the data packet to be stored.

14. The method of claim 12 , wherein said allocating and said storing are performed entirely by hardware.

15. The method of claim 12 wherein hardware determines the size of the portion of memory and passes a value representing the size of the portion of memory to software to allocate the portion of memory.

16. The method of claim 12 , wherein adding said first value to a size of the data packet is in further response to determining the data packet is of a first type, and wherein the method further comprises adding a second value to the size of the data packet, in response to detecting the data packet is of a second type, wherein the second value is different from the first value.

17. The method of claim 12 , further comprising adding data to the stored data packet without moving the stored data packet in memory, wherein data added to the data packet is stored in the first and/or the second unoccupied sub-portions of the portion of memory.

18. The method of claim 12 , further comprising changing the first value to a second value for a given data packet type.

19. The method of claim 12 , further comprising tracking growth and shrinkage of a given data packet during processing, and using the tracked growth and shrinkage to determine a starting point of the given data packet in memory after processing and before download.

20. The method of claim 12 , further comprising:

determining that data is to be added to a stored data packet which is stored in an allocated memory location; and

moving the stored data packet to a different memory location in response to detecting said allocated memory location cannot accommodate both said stored data packet and the data to be added.

21. The method of claim 20 , wherein a size of data to be added to a header of the stored data packet is greater than a size of the first unoccupied sub-portion.

22. The method of claim 20 , wherein a size of data to be added to a tail of the stored data packet is greater than the size of the second unoccupied sub-portion.

23. A system comprising:

a processor comprising a first memory configured to store data packets; and

a second memory configured to store data packets;

wherein the processor is configured to:

allocate a portion of the first memory for storing a data packet, wherein a size of the portion of the first memory is determined by adding a first value to a size of the data packet; and

store the data packet within the portion of the first memory between a first unoccupied sub-portion and a second unoccupied sub-portion of the portion of the first memory.

24. The system of claim 23 , wherein the processor is further configured to add data to the stored data packet without moving the stored data packet in the first memory, and wherein data added to the data packet is stored in the first and/or the second unoccupied sub-portions of the portion of the first memory.

25. The system of claim 23 , wherein the processor is further configured to:

determine that data is to be added to a stored data packet which is stored in an allocated memory location in the first memory; and

move the stored data packet to a different memory location in response to detecting said allocated memory location in the first memory cannot accommodate both said stored data packet and the data to be added.

26. The system of claim 25 , wherein the different memory location is within the second memory.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: BRIDGE CROSSING, LLC
To: ARM FINANCE OVERSEAS LIMITED
Reel/Frame 033074/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2013
From: MIPS TECHNOLOGIES, INC.
To: BRIDGE CROSSING, LLC
Reel/Frame 030202/0440 →
RELEASE OF SECURITY INTEREST Recorded Dec 16, 2008
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: MIPS TECHNOLOGIES, INC.
Reel/Frame 021985/0015 →
SECURITY AGREEMENT Recorded Aug 24, 2007
From: MIPS TECHNOLOGIES, INC.
To: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 019744/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2006
From: CLEARWATER NETWORKS, INC.
To: MIPS TECHNOLOGIES, INC.
Reel/Frame 017909/0128 →