Eliminate IMC cracking in post wirebonded dies: macro level stress reduction by modifying dielectric/metal film stack in be layers during Cu/Low-K processing
View Patent ↗Different ways to reduce or eliminate the IMC cracking issues in wire bonded parts, including: changing to more compressive dielectric films for top, R1, and R2; changing the top passivation film stacks to more compressive films; changing the low k film to a higher compressive film; reducing the R layer thickness and pattern density to reduce tensile stress; and minimizing anneal and dielectric deposition temperatures. Each of the methods can be used individually or in combination with each other to reduce overall tensile stresses in the Cu/low-k wafer thus reducing or eliminating the IMC cracking issue currently seen in the post wire bonded parts.
1. A method for reducing or eliminating IMC cracking issues in wire bonded parts, said method comprising at least one of the following: using a material having a compressive value greater than −2.7 E9 for at least one of the top, R1, and R2 layers; using a low K film having a compressive value of at least −2.7 E9; using for the R layer, a material which has a thickness of at least 8000 Å and has a density of at least 50%; using a deposition temperature of no more than 350 degrees Celsius for TEOS or silane films, and using an anneal temperature of no more than 300 degrees Celsius.
2. A method as recited in claim 1 , wherein the step of using a material having a compressive value greater than −2.7 E9 for at least one of the top, R1 and R2 layers comprises using TEOS.
3. A method as recited in claim 1 , wherein the step of using a low K film having a compressive value of at least −2.7 E9 comprises using TEOS.
4. A method as recited in claim 1 , wherein the step of using for the R layer, a material which has a thickness of at least 8000 Å and has a density of at least 50%, comprises using TEOS.