IP Library Granted Patent US 7,435,619
Granted Patent B2
US 7,435,619 · App. 11/307,615 · Granted Oct 14, 2008

Method of fabricating a 3-D package stacking system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,435,619
App. No.
11/307,615
Granted
Oct 14, 2008
Kind
B2
Abstract

The present invention provides a system for 3D package stacking system, comprising providing a substrate, attaching a ball grid array package, in an inverted position, to the substrate, forming a lower package, the lower package having the ball grid array package and the substrate encapsulated by a molding compound and attaching a second integrated circuit package over the lower package.

Claims (36)

1. A system for 3D package stacking system, comprising:

providing a substrate;

attaching a ball grid array package, in an inverted position, to the substrate;

forming a lower package, the lower package having the ball grid array package and the substrate encapsulated by a molding compound, wherein solder balls of the ball grid array package protrude from the molding compound of the lower package; and

attaching a second integrated circuit package over the lower package.

2. The system as claimed in claim 1 further comprising forming a BGA interposer in the ball grid array package.

3. The system as claimed in claim 1 further comprising attaching an encapsulated integrated circuit between the substrate and the ball grid array package within the lower package.

4. The system as claimed in claim 1 further comprising mounting an IC spacer over an integrated circuit die attached between the substrate and the ball grid array package.

5. The system as claimed in claim 1 further comprising applying an underfill material to stabilize the second integrated circuit package mounted over the lower package.

6. A 3D package stacking system, comprising:

providing a substrate having embedded components electrically attached to a top substrate surface;

attaching a ball grid array package, in an inverted position, to the substrate further comprises connecting a bond wire between the substrate and the ball grid array package;

forming a lower package, the lower package having the ball grid array package and the substrate encapsulated by a molding compound, wherein solder balls of the ball grid array package protrude from the molding compound of the lower package; and

attaching a second integrated circuit package over the lower package further comprises providing a signal path through the lower package to a printed circuit board interface.

7. The system as claimed in claim 6 further comprising forming a BGA interposer in the ball grid array package, wherein the BGA interposer establishes the connection pattern for the second integrated circuit package mounted over the lower package.

8. The system as claimed in claim 6 further comprising attaching an encapsulated integrated circuit between the substrate and the ball grid array package, wherein the encapsulated integrated circuit is electrically attached to the substrate and the ball grid array package.

9. The system as claimed in claim 6 further comprising utilizing an IC spacer over an integrated circuit die attached between the substrate and the ball grid array package, wherein the die is electrically attached to the substrate and the ball grid array package.

10. The system as claimed in claim 6 further comprising applying an underfill material to stabilize the second integrated circuit package mounted over the lower package.

11. A 3D package stacking system, comprising:

a substrate;

a ball grid array package, in an inverted position, attached to the substrate;

a lower package comprising the ball grid array package and the substrate encapsulated by a molding compound, wherein solder balls of the ball grid array package protrude from the molding compound of the lower package; and

a second integrated circuit package attached over the lower package.

12. The system as claimed in claim 11 further comprising a BGA interposer in the ball grid array package.

13. The system as claimed in claim 11 further comprising an encapsulated integrated circuit attached between the substrate and the ball grid array package.

14. The system as claimed in claim 11 further comprising an IC spacer mounted over an integrated circuit die attached between the substrate and the ball grid array package.

15. The system as claimed in claim 11 further comprising an underfill material to stabilize the second integrated circuit package mounted over the lower package.

16. The system as claimed in claim 11 , wherein a substrate, a ball grid array package, in an inverted position, attached to the substrate, a lower package comprising the ball grid array package and the substrate encapsulated by a molding compound and a second integrated circuit package attached over the lower package;

further comprising:

embedded components electrically attached to a top substrate surface;

a bond wire connected between the substrate and the ball grid array package; and

a signal path for the second integrated circuit package through the lower package to a printed circuit board interface.

17. The system as claimed in claim 16 further comprising a BGA interposer in the ball grid array package, wherein the BGA interposer establishes the connection pattern for the second integrated circuit package mounted over the lower package.

18. The system as claimed in claim 16 further comprising an encapsulated integrated circuit attached between the substrate and the ball grid array package, wherein the encapsulated integrated circuit is electrically attached to the substrate and the ball grid array package.

19. The system as claimed in claim 16 further comprising an IC spacer, mounted over an integrated circuit die, attached between the substrate and the ball grid array package, wherein the die is electrically attached to the substrate and the ball grid array package.

20. The system as claimed in claim 16 further comprising an underfill material to stabilize the second integrated circuit package mounted over the lower package.

Assignments (5)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC, PTE. LTE TO STATS CHIPPAC PTE. LTD (REEL: 038378 FRAME: 0319) Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064760/0986 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052938/0305 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0319 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2006
From: SHIM, IL KWON; HAN, BYUNG JOON; CHOW, SENG GUAN
To: STATS CHIPPAC LTD.
Reel/Frame 017168/0495 →