IP Library Granted Patent US 7,488,428
Granted Patent B2
US 7,488,428 · App. 11/309,852 · Granted Feb 10, 2009

Method for forming stacked via-holes in printed circuit boards

Assignee: Foxconn Advanced Technology Inc.
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Quick Facts
Patent No.
US 7,488,428
App. No.
11/309,852
Granted
Feb 10, 2009
Kind
B2
Abstract

A method for forming stacked via-holes on a printed circuit board includes the steps of: providing a printed circuit board having a conductive trace formed on a side surface thereof; forming a first copper-clad laminate on the side surface having the conductive trace; forming a number of first copper micro-via in a copper layer of the first copper-clad laminate; forming a second copper-clad laminate on the surface of the copper layer having the first copper micro-via of the first copper-clad laminate; forming a number of second copper micro-via in a copper layer of the second copper-clad laminate by a first laser on the basis of the first copper micro-via, each second copper micro-via being located corresponding to its correspondingly first copper micro-via; and removing corresponding resin layer portions of the first and second copper-clad laminates, using a second laser, to yield the respective stacked via-holes.

Claims (32)

1. A method for forming stacked via-holes, said method comprising:

providing a printed circuit board having a conductive trace formed on a side surface thereof;

forming a first metal-clad laminate on the side surface having the conductive trace;

forming a plurality of first metal micro-vias in a metal layer of the first metal-clad laminate;

forming a second metal-clad laminate on the surface of the metal layer of the first metal-clad laminate after having formed the first metal micro-vias in such metal layer thereof;

forming a plurality of second metal micro-vias in a metal layer of the second metal-clad laminate using a first laser, each second metal micro-via being located corresponding to a location of a respective first metal micro-via, a diameter of the second metal micro-via being larger than that of the first metal micro-via; and

removing corresponding resin layer portions of the first and second metal-clad laminates using a second laser, in order to yield stacked via-holes.

2. The method as claimed in claim 1 , wherein the provided printed circuit board is a high density interconnection flexible printed circuit board.

3. The method as claimed in claim 1 , wherein the provided printed circuit board is a high density interconnection rigid printed circuit board.

4. The method as claimed in claim 1 , wherein the first metal micro-vies are formed with an etching process.

5. The method as claimed in claim 1 , wherein the resin layer portions of the first and second metal-clad laminates are removed using a laser method.

6. The method as claimed in claim 1 , wherein, in the step for forming the second metal micro-vias, a given first metal micro-via acts as a reference point that the first laser can identify.

7. The method as claimed in claim 1 , further comprising a step of metallizing an inside surface of each stacked via-hole.

8. The method as claimed in claim 1 , wherein the stacked via-holes display a high concentricity between the respective micro-via holes of which each is composed.

9. The method as claimed in claim 1 , wherein the resin layer portions wholly exposed to the first and second metal micro-vias of the first and second metal-clad laminates are removed using the second laser.

10. The method as claimed in claim 1 , wherein the first metal-clad laminate is wetted with water before forming on the side surface of the printed circuit board.

11. The method as claimed in claim 1 , wherein the first metal micro-vias are formed with a laser process.

12. The method as claimed in claim 11 , wherein the second metal micro-vias are fanned by a Nd:YAG (Neodymium:Yttrium-Aluminum-Garnet) laser.

13. The method as claimed in claim 1 , wherein the metal layer of each of the first metal-clad laminate and the second metal-clad laminate is comprised of a highly conductive, oxidation resistant metal.

14. The method as claimed in claim 13 , wherein the highly conductive, oxidation resistant metal is comprised of copper.

15. The method as claimed in claim 1 , wherein the first laser for forming the second metal micro-vias is an ultraviolet laser or an infrared laser.

16. The method as claimed in claim 15 , wherein the second metal micro-vias are formed by a fourth harmonic Nd:YAG laser.

17. The method as claimed in claim 15 , wherein the second metal micro-vias are formed by a third harmonic Nd:YAG laser.

18. The method as claimed in claim 17 , wherein the resin layer portions of the first and second metal-clad laminates are removed using a carbon dioxide laser.

19. A method for forming binary stacked via-holes, each binary stacked via hole being composed of a first micro hole and a second micro hole stacked one on another, the first micro hole being composed of a first metal micro-via and a first film micro-via, the second micro hole being composed of a second metal micro-via and a second film micro-via, said method comprising:

providing a printed circuit board having a conductive trace formed on a side surface thereof;

forming a first metal-clad laminate comprising a first metal layer and a first resin layer on the side surface having the conductive trace;

forming a plurality of first metal micro-vias in the first metal layer of the first metal-clad laminate;

forming a second metal-clad laminate comprising a second metal layer and a second resin layer on the surface of the first metal layer of the first metal-clad laminate after having formed the first metal micro-vias in the first metal layer;

forming a plurality of second metal micro-vias in the second metal layer of the second metal-clad laminate by a first laser, each second metal micro-via being located corresponding to a respective first metal micro-via, a diameter of the second metal micro-via being larger than or equal to that of the first metal micro-via; and

removing parts of the second resin layer corresponding to the second metal micro-via and parts of the first resin layer corresponding to the first metal micro-via by a second laser to obtain a plurality of first film micro-vias in the first resin layer and a plurality of second film micro-vias in the second resin layer, thereby yielding a plurality of binary stacked via-holes.

20. The method as claimed in claim 19 , wherein the parts of the second resin layer wholly exposed to the second metal micro-vies and the parts of the first resin layer wholly exposed to the first metal micro-vias are removed by the second laser to obtain the first film micro-vies in the first resin layer and the second film micro-vias in the second resin layer, respectively.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2017
From: ZHEN DING TECHNOLOGY CO., LTD.
To: GARUDA TECHNOLOGY CO., LTD
Reel/Frame 040978/0629 →
CHANGE OF NAME Recorded Sep 13, 2011
From: FOXCONN ADVANCED TECHNOLOGY INC.
To: ZHEN DING TECHNOLOGY CO., LTD.
Reel/Frame 026893/0752 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2006
From: LEE, WEN-CHIN; LIN, CHENG-HSIEN
To: FOXCONN ADVANCED TECHNOLOGY INC.
Reel/Frame 018390/0216 →
Priority Claims (1)
TW 95117893 A · May 19, 2006 · national
Continuity (1)
Related Publication 20070269588A1 · Nov 22, 2007