Integrated circuit including a memory apparatus and production method
View Patent ↗The memory apparatus according to the invention and having a cell 14 has a high electrical resistance in a first state and a low electrical resistance in a second state. The cell 14 has an edge area 16 and a core area 15 , in which the electrical resistivity in the edge area 16 is higher than in the core area 15 in the second state.
1. A method for producing an integrated circuit including a cell in a memory apparatus, the method comprising:
applying and structuring a phase change material to a mount substrate to form a preform of the cell; and
introducing impurities into the perform such that the concentration of impurities in an edge area is higher than in a core area of the preform to form the cell which has reduced specific electrical conductivity in the edge area and such that sidewalls of the core area are perpendicular to the mount substrate,
wherein the impurities are introduced by diffusion from an atmosphere containing the impurities.
2. The method of claim 1 , wherein the concentration of the impurities decreases continuously from the edge area to the core area.
3. The method of claim 1 , wherein the impurities include oxygen, nitrogen and/or silicon.
4. The method of claim 1 , wherein the concentration of impurities in the atmosphere during the application of the phase change material is reduced from a first maximum value to a minimum value and is then increased again to a second maximum value, so that the core area has a lower concentration than layers of the active material which are applied first and last.
5. The method of claim 1 , wherein the impurities comprise silicon.
6. A method for fabricating an integrated circuit, the method comprising:
providing a substrate including a first contact;
depositing an active material over the first contact;
etching the active material to provide a cell consisting of active material directly physically contacting the first contact;
introducing impurities into the cell to provide an edge region of the cell having a higher concentration of impurities than a core region of the cell and such that sidewalls of the core region are perpendicular to the first contact; and
fabricating a second contact directly physically contacting the active material,
wherein introducing the impurities comprises introducing the impurities by diffusion from an atmosphere containing the impurities.
7. The method of claim 6 , wherein depositing the active material comprises depositing a phase change material.
8. The method of claim 6 , wherein introducing the impurities comprises introducing at least one of oxygen, nitrogen, and silicon.
9. The method of claim 6 , wherein the impurities comprise silicon.
10. A method for fabricating an integrated circuit, the method comprising:
providing a substrate including a first contact comprising a surface;
depositing a phase change material over the surface of the first contact;
etching the phase change material to provide a cell consisting of phase change material directly contacting the surface of the first contact;
introducing impurities by diffusion from an atmosphere containing the impurities into sidewalls of the cell to provide an edge region of the cell having a higher concentration of impurities than a core region of the cell and such that sidewalls of the core region are perpendicular to the surface of the first contact;
laterally surrounding the cell with a filling compound, the filling compound directly contacting the surface of the first contact; and
fabricating a second contact directly contacting the phase change material and the filling compound.
11. The method of claim 10 , wherein the impurities comprise silicon.