Stack of semiconductor chips
View Patent ↗A stack of semiconductor chips includes a substrate or an interposer board comprising conductor structures for electrical connection of the stack and a first chip. The first chip includes an active side with peripherally arranged bonding pads and is mounted face-up on the substrate or the interposer board. The stack beyond includes at least a further chip with peripherally arranged bonding pads on its active side. The back side and at least two chip edges of the further chip are embedded by a mold cap providing a protuberance on the back side of the chip. The protuberance forms a planar surface extending substantially parallel and with a distance to the back side of the chip. The further chip is attached face-up to the active side of the first chip by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between both chips to provide a gap there. The protuberance has at least one linear dimension that is smaller than a linear dimension of the subjacent chip.
1. A stack of semiconductor chips comprising:
a substrate or an interposer board comprising conductor structures for electrical connection of the stack,
a first chip including an active side with peripherally arranged bonding pads mounted face-up on the substrate or the interposer board;
a further chip including a further active side with peripherally arranged bonding pads; and
a mold cap embedding a back side and at least two chip edges of the further chip and including a protuberance at the back side of the further chip, the protuberance forming a substantially planar first surface extending substantially parallel to and a distance from the back side of the further chip,
wherein the further chip is attached face-up to the active side of the first by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between the first chip and the further chip thereby providing a gap therebetween, the protuberance having at least one linear dimension that is smaller than a linear dimension of the first chip.
2. The stack of semiconductor chips according to claim 1 , wherein the mold cap comprises mold compound.
3. The stack of semiconductor chips according to claim 1 , further comprising a second mold cap embedding a back side and at least two chip edges of the first chip, the first chip being mounted on the substrate or the interposer board by an adhesive applied between a protuberance of the second mold cap and the substrate or the interposer board.
4. The stack of semiconductor chips according to claim 3 , wherein the mold cap and the second mold cap have substantially the same dimensions.
5. The stack of semiconductor chips according to claim 1 , wherein the protuberance includes at least two laterally spaced portions that have substantially co-planar surfaces.
6. The stack of semiconductor chips according to claim 1 , further comprising electrical connection between the bonding pads of the first chip and the further chip and the conductor structures.
7. The stack of semiconductor chips according to claim 6 , wherein the first chip, the further chip and the electrical connection are encapsulated with a mold compound.
8. The stack of semiconductor chips according to claim 1 , further comprising:
a second further chip including an active side with peripherally arranged bonding pads; and
a second mold cap embedding a back side and at least two chip edges of the second further chip and including a protuberance at the back side of the second further chip, the protuberance forming a substantially planar first surface extending substantially parallel to and a distance from the back side of the second further chip;
wherein the second further chip is attached face-up to the active side of the further chip by an adhesive applied between the protuberance and the further chip.
9. A stack of semiconductor chips comprising:
a substrate or an interposer board comprising conductor structures for electrical connection of the stack,
a first chip including an active side with peripherally arranged bonding pads mounted face-up on the substrate or the interposer board;
a further chip including a further active side with peripherally arranged bonding pads; and
a mold cap embedding a back side and at least two chip edges of the further chip and including a protuberance at the back side of the further chip, the protuberance forming a substantially planar first surface extending substantially parallel to and a distance from the back side of the further chip,
wherein the further chip is attached face-up to the active side of the first by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between the first chip and the further chip thereby providing a gap therebetween, the protuberance having at least one linear dimension that is smaller than a linear dimension of the first chip, and wherein the protuberance and the first chip provide positioning marks that are compatible to one another.
10. The stack of semiconductor chips according to claim 9 , wherein the mold cap comprises mold compound.
11. The stack of semiconductor chips according to claim 9 , further comprising a second mold cap embedding a back side and at least two chip edges of the first chip, the first chip being mounted on the substrate or the interposer board by an adhesive applied between a protuberance of the second mold cap and the substrate or the interposer board.
12. The stack of semiconductor chips according to claim 9 , wherein the protuberance includes at least two laterally spaced portions that have substantially co-planar surfaces.
13. The stack of semiconductor chips according to claim 9 , further comprising electrical connection between the bonding pads of the first chip and the further chip and the conductor structures.
14. The stack of semiconductor chips according to claim 13 , wherein the first chip, the further chip and the electrical connection are encapsulated with a mold compound.
15. A stack of semiconductor chips comprising:
a substrate or an interposer board comprising conductor structures for electrical connection of the stack,
a first chip including an active side with peripherally arranged bonding pads mounted face-up on the substrate or the interposer board;
a further chip including a further active side with peripherally arranged bonding pads; and
a mold cap embedding a back side and at least two chip edges of the further chip and including a protuberance at the back side of the further chip, the protuberance forming a substantially planar first surface extending substantially parallel to and a distance from the back side of the further chip, the mold cap comprising a mold compound,
wherein the further chip is attached face-up to the active side of the first by an adhesive applied between the protuberance and the first chip so that the protuberance is inserted between the first chip and the further chip thereby providing a gap therebetween, the protuberance having at least one linear dimension that is smaller than a linear dimension of the first chip; and
a further mold compound surrounding the stack of semiconductor chips.