Well region with rounded corners

1. A semiconductor imager structure, comprising:

a substrate layer of a first dopant type having a first surface;

a well region having a second surface and being of a second dopant type;

said well region being formed in said substrate layer such that said first surface and said second surface are substantially co-planar to form a diode surface and an interface between said well region and said substrate layer at said diode surface forms a diode junction, and said well region being of a predetermined shape having a multitude of corners, a plurality of said corners of said well region being no-right angles; and

a poly silicon region formed along a periphery of said diode junction, wherein said poly silicon region is electrically connected to a poly silicon region of an adjacent pixel site by a polysilicon layer.

2. The semiconductor image structure as claimed in claim 1 , wherein said first dopant type is p-type, said second dopant type is n-type, and said poly silicon region is doped.

3. The semiconductor imager structure as claimed in claim 1 , wherein said first dopant types is n-type, second dopant type is p-type, and said poly silicon region is doped.

4. The semiconductor imager structure as claimed in claim 1 , wherein said corners of said well region are obtuse angles.

5. The semiconductor structure as claimed in claim 1 , wherein said poly silicon region is electrically biased at a fixed potential.