Instruction for conditionally yielding to a ready thread based on priority criteria
View Patent ↗An integrated circuit ( 10 ) has a conditional yield instruction ( 305 ) which may be used to conditionally yield execution of a currently active thread based on priority and status of other threads. In one embodiment, an I bit 304 may be used to designate whether the priority selection bits ( 50 ) are stored in the instruction itself. If the priority selection bits ( 50 ) are not stored in the instruction itself, a portion of the instruction ( 302 ) may be used to store a location indicator which indicates where the priority selection bits ( 50 ) are located (e.g. register file 22 ).
1. A method for operating an integrated circuit having a processor, the method comprising:
representing an instruction of the processor using a plurality of bits;
using a first portion of the plurality of bits to determine that the instruction is a conditional yield instruction;
using a second portion of the instruction to determine where at least one priority selection bit is located;
when the second portion of the instruction determines that the at least one priority selection bit is located in the instruction itself, using a third portion of the instruction to store the at least one priority selection bit;
when the second portion of the instruction determines that the at least one priority selection bit is not located in the instruction itself, using a register to store the at least one priority selection bit;
using the at least one priority selection bit to select a selected priority criterion from a plurality of priority criteria;
when the selected priority criterion is a first criterion, comparing a priority of a currently executing thread with a priority of a second thread that is ready to run to produce a comparison result; and
when the selected priority criterion is the first criterion, using the comparison result to determine if the currently executing thread should yield to the second thread, wherein the step of using the comparison result to determine if the currently executing thread should yield to the second thread comprises yielding to the second thread when the priority of the second thread is higher than the priority of the currently executing thread,
wherein none of the plurality of priority criteria produce a change in priority of any thread.
2. A method as in claim 1 , wherein the selected priority criterion comprises whether the second thread is ready to run.
3. A method as in claim 1 , wherein the conditional yield instruction uses “yield” as its mnemonic.
4. A method as in claim 1 , further comprising:
when the selected priority criterion is a second criterion, causing the currently executing thread to yield to the second thread regardless of the priority of the currently executing thread and regardless of the priority of the second thread.
5. A method as in claim 1 , wherein the step of using the comparison result to determine if the currently executing thread should yield to the second thread comprises continuing to execute the currently executing thread when the priority of the second thread is equal to the priority of the currently executing thread.
6. A method as in claim 1 , further comprising:
providing storage circuitry for storing thread state information.
7. A method as in claim 6 , wherein the thread state information comprises a thread identifier.
8. A method as in claim 6 , wherein the thread state information comprises a thread priority portion.
9. A method as in claim 6 , wherein the thread state information comprises a thread ready portion.
10. An apparatus, comprising:
first storage circuitry for storing an identifier for a currently executing thread;
second storage circuitry for storing a priority value for the currently executing thread;
third storage circuitry for storing an identifier for a second thread;
fourth storage circuitry for storing a priority value for the second thread;
fifth storage circuitry for storing a ready value for the second thread;
at least one priority selection bit; and
control circuitry, coupled to the first, second, third, fourth, and fifth storage circuitry, and coupled to receive the at least one priority selection bit,
wherein the control circuitry uses the at least one priority selection bit to select one of a plurality of priority criteria,
wherein the one of the plurality of priority criteria comprises when another thread with priority at least equal to the priority value for the currently executing thread minus one is ready to run, then thread switch,
wherein during execution of a conditional yield instruction, said control circuitry uses both the ready value for the second thread and the at least one priority selection bit in determining whether the currently executing thread should yield at least one resource to the second thread,
wherein no value of the one or more priority selection bits results in a change in priority of the currently executing thread.
11. An apparatus as in claim 10 , further comprising:
sixth storage circuitry for storing an identifier for a third thread;
seventh storage circuitry for storing a priority value for the third thread; and
eighth storage circuitry for storing a ready value for the third thread,
wherein during execution of the conditional yield instruction, when the control circuitry compares the priority value for the currently executing thread and the priority value for the second thread, said control circuitry uses the at least one priority selection bit to determine how to compare the priority value for the currently executing thread and the priority value for the second thread,
wherein during execution of the conditional yield instruction, when both the ready value for the second thread and the at least one priority selection bit indicate that a comparison is needed, the control circuitry compares the priority value for the currently executing thread and the priority value for the second thread and produces a comparison result,
wherein during execution of the conditional yield instruction, when the control circuitry produces the comparison result, the comparison result is used in determining whether the currently executing thread should yield at least one resource to the second thread,
wherein during execution of the conditional yield instruction, said control circuitry uses both the ready value for the third thread and the at least one priority selection bit in determining whether the currently executing thread should yield at least one resource to the third thread,
wherein during execution of the conditional yield instruction, when the control circuitry compares the priority value for the currently executing thread and the priority value for the third thread, said control circuitry uses the at least one priority selection bit to determine how to compare the priority value for the currently executing thread and the priority value for the third thread,
wherein during execution of the conditional yield instruction, when both the ready value for the third thread and the at least one priority selection bit indicate that a comparison is needed, the control circuitry compares the priority value for the currently executing thread and the priority value for the third thread and produces a second comparison result, and
wherein during execution of the conditional yield instruction, when the control circuitry produces the second comparison result, the second comparison result is used in determining whether the currently executing thread should yield at least one resource to the third thread.
12. An apparatus as in claim 10 , wherein the a second one of the plurality of priority criteria comprises when another thread with priority at least equal to the priority value for the currently executing thread is ready to run, then thread switch.
13. An apparatus as in claim 12 , wherein a third one of the plurality of priority criteria comprises when another thread with higher priority is ready to run, then thread switch.
14. An apparatus as in claim 13 , wherein the conditional yield instruction is never able to change thread priority.
15. An apparatus as in claim 10 , wherein the at least one resource comprises an execution unit.