IP Library Granted Patent US 7,531,406
Granted Patent B2
US 7,531,406 · App. 11/399,811 · Granted May 12, 2009

Method for fabricating an electrical component

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Quick Facts
Patent No.
US 7,531,406
App. No.
11/399,811
Granted
May 12, 2009
Kind
B2
Abstract

An electrical component, such as a DRAM semiconductor memory or a field-effect transistor is fabricated. At least one capacitor having a dielectric ( 130 ) and at least one connection electrode ( 120, 140 ) are fabricated. To enable the capacitors fabricated to have optimum storage properties even for very small capacitor structures, the dielectric ( 130 ) or the connection electrode ( 120, 140 ) are formed in such a manner that transient polarization effects are prevented or at least reduced.

Claims (48)

1. A method for fabricating an integrated circuit, the method comprising:

forming a dielectric;

adding within the dielectric a material, the material disrupting or at least reducing an equal distribution of potential wells within the dielectric; and

forming at least one electrode in contact with the dielectric,

wherein the dielectric and/or the at least one electrode are formed in such a manner that transient polarization effects are prevented or at least reduced.

2. The method as claimed in claim 1 , wherein the at least one electrode comprises a material that acts as a getter for protons of the dielectric.

3. The method as claimed in claim 1 , wherein the dielectric comprises a ternary, quaternary or higher material system comprising at least the following constituents:

at least one oxide or nitride of a metal from the fourth transition group of the periodic system or at least one conductive oxide; and

at least one element from the third or fourth main group or the fifth transition group of the periodic system.

4. The method as claimed in claim 3 , wherein the dielectric comprises an Hf—Ti oxide, an Hf—Ti nitride, a Zr—Ti oxide or a Zr—Ti nitride with an admixture of aluminum or silicon.

5. The method as claimed in claim 4 , wherein the dielectric comprises an Hf x Al y Ti z oxide, an Hf x Al y Ti z nitride, an Hf xSi y Ti z oxide, an Hf x Si y Ti z nitride, a Zr x Al y Ti z oxide, a Zr x Al y Ti z nitride, a Zr x Si y Ti z oxide or a Zr x Si y Ti z nitride.

6. The method as claimed in claim 3 , wherein the dielectric comprises an Hf—Ta oxide, an Hf—Ta nitride, a Zr—Ta oxide or a Zr—Ta nitride with an admixture of aluminum or silicon.

7. The method as claimed in claim 6 , wherein the dielectric comprises an Hf x Al y Ta z oxide, an Hf x Al y Ta z nitride, an Hf x Si y Ta z oxide, an Hf x SiyTa z nitride, a Zr x Al y Ta z oxide, a Zr x Al y Ta z nitride, a Zr x Si y Ta z oxide or a Zr x Si y Ta z nitride.

8. The method as claimed in claim 3 , wherein the dielectric comprises HfO 2 with SiO 2 and TiO 2 admixed to it.

9. The method as claimed in claim 8 , wherein mixing ratios are set in such a manner that the proportion of the SiO 2 amounts to at most 90%, and the proportion of the TiO 2 amounts to at least 5%.

10. The method as claimed in claim 3 , wherein the dielectric comprises a mixed dielectric comprising at least one of the following materials: HfTaO x , HfAlO x , TaTiO x , AlTiO x , ZrTaO x , ZrAlO x , HfZrO x , ZrSiO x , ZrTiAl.

11. The method as claimed in claim 1 , wherein the dielectric comprises ZrTiO x .

12. The method as claimed in claim 1 , wherein the dielectric comprises a metal oxide, and wherein a lanthanide is admixed to the metal oxide.

13. The method as claimed in claim 12 , wherein the metal oxide comprises HfO 2 , Al 2 O 3 , TiO 2 , ZrO 2 or Ta 2 O 5 .

14. The method as claimed in claim 1 , wherein at least one connection electrode is produced from a material that contains an element from the eighth transition group of the periodic system.

15. The method as claimed in claim 1 , wherein at least one connection electrode is produced from a material that contains HfN, TiN, ruthenium, iridium, NbN or TaN.

16. The method as claimed in claim 1 , wherein two connection electrodes are produced from the same material.

17. The method as claimed in claim 16 , wherein the two connection electrodes are produced from TaN, and the dielectric is produced from HfTiO x .

18. The method as claimed in claim 16 , wherein the two connection electrodes are produced from TiN, and the dielectric is produced from HfTiO x .

19. The method as claimed in claim 16 , wherein the two connection electrodes are produced from ruthenium or iridium, and the dielectric is produced from HfTiO x .

20. The method as claimed in claim 1 , wherein two connection electrodes are produced from different materials.

21. The method as claimed in claim 20 , wherein one connection electrode is formed from TiN and the other connection electrode is formed from ruthenium or iridium, and the dielectric is formed from HfTiO x , HfSiO x or HfO 2 .

22. The method as claimed in claim 20 , wherein one connection electrode is formed from TaN and the other connection electrode is formed from ruthenium or iridium, and the dielectric is formed from HfTiO x .

23. The method as claimed in claim 1 wherein forming the dielectric comprises forming a capacitor dielectric and wherein forming the at least one electrode comprises forming an inner connection electrode or an upper electrode, wherein the inner connection electrode is produced from TiN and the upper electrode is produced from ruthenium or iridium, and HfTiO 2 is used as the capacitor dielectric.

24. The method as claimed in claim 1 , wherein a capacitor is formed in a recess that has been introduced into a silicon substrate, wherein forming the dielectric comprises forming a capacitor dielectric of the capacitor.

25. The method as claimed in claim 24 , wherein the capacitor is formed as a stacked capacitor.

26. The method as claimed in claim 1 , wherein forming the dielectric comprises forming a capacitor dielectric of a capacitor of a DRAM memory cell, the capacitor having a feature with a size of less than 60 nm.

27. The method as claimed in claim 1 , wherein forming the dielectric comprises forming a gate dielectric of a field-effect transistor, and wherein forming the at least one electrode comprises forming a gate of the field-effect transistor.

28. A method for fabricating an integrated circuit, the method comprising:

forming a dielectric; and

forming at least one electrode in contact with the dielectric,

wherein the dielectric comprises a mixed oxide or a mixed nitride comprising at least one element selected from the group consisting of zirconium and hafnium and one element selected from the group consisting of titanium and tantalum, wherein the dielectric further comprises silicon as an additive.

29. The method of claim 28 , wherein the dielectric further comprises aluminum as an additive.

30. A method for fabricating an integrated circuit, the method comprising:

forming a dielectric; and

forming at least one electrode in contact with the dielectric,

wherein the dielectric comprises a compound selected from the group consisting of ZrAlO x , HfZrO x , ZrTiAl, ZrSiO x , and HfO 2 , the dielectric further comprising an additive of SiO 2 .

31. A method for fabricating an integrated circuit, the method comprising:

forming a dielectric; and

forming at least one electrode in contact with the dielectric,

wherein the dielectric comprises HfO 2 comprising an additive of SiO 2 and/or TiO 2 , and

wherein the at least one electrode comprises a metal selected from the group consisting of ruthenium and iridium.

32. The method as claimed in claim 30 , wherein the dielectric comprises a compound selected from the group consisting of ZrAlO x , HfZrO x , ZrTiAl, ZrSiO x , AlTiO x and HfO 2 .

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2015
From: INFINEON TECHNOLOGIES AG
To: POLARIS INNOVATIONS LIMITED
Reel/Frame 036701/0926 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2015
From: QIMONDA AG
To: INFINEON TECHNOLOGIES AG
Reel/Frame 035623/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 023773/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2006
From: AVELLAN, ALEJANDRO; HECHT, THOMAS; JAKSCHIK, STEFAN; SCHROEDER, UWE
To: INFINEON TECHNOLOGIES AG
Reel/Frame 018186/0904 →