Semiconductor device with surge current protection and method of making the same

1. A semiconductor device comprising:

a discrete raised region of n-type SiC semiconductor material on an n-type SiC semiconductor substrate layer, wherein the discrete raised region of n-type SiC semiconductor material has an upper surface and sidewalls and wherein the SiC semiconductor substrate layer extends beyond the sidewalls;

one or more discrete raised regions of p-type SiC semiconductor material on a central portion of the upper surface of the n-type SiC semiconductor material;

a continuous raised region of p-type SiC semiconductor material on a peripheral portion of the upper surface of the n-type SiC semiconductor material and circumscribing the one or more discrete raised regions of p-type SiC semiconductor material, the continuous raised region of p-type SiC semiconductor material having a peripheral edge;

ohmic contacts on the one or more discrete raised regions of p-type SiC and on the continuous raised region of p-type SiC semiconductor material;

one or more layers of dielectric material on the SiC semiconductor substrate layer extending beyond the periphery of the discrete region of n-type SiC semiconductor material and on the sidewalls of the n-type region and on the peripheral edge of the continuous raised region of p-type SiC semiconductor material; and

a first metal layer on and in contact with: the ohmic contacts on the one or more discrete raised regions of p-type SiC; the ohmic contact on the continuous raised region of p-type SiC semiconductor material; and the region of n-type SiC semiconductor material.

2. The semiconductor device of claim 1 , further comprising an ohmic contact on the semiconductor substrate layer opposite the layer of n-type semiconductor material.

3. The semiconductor device of claim 2 , further comprising a second metal layer in contact with the ohmic contact on the semiconductor substrate layer opposite the layer of n-type semiconductor material.

4. The semiconductor device of claim 1 , wherein the n-type SiC substrate has a doping concentration of >1×10 18 cm −3 .

5. The semiconductor device of claim 1 , wherein the n-type SiC semiconductor region has a doping concentration of 5×10 14 -1×10 17 cm −3 .

6. The semiconductor device of claim 1 , wherein the one or more discrete raised regions of p-type SiC semiconductor material and the continuous raised region of p-type SiC semiconductor material each have a doping concentration of 5×10 14 -1×10 17 cm −3 .

7. The semiconductor device of claim 1 , wherein the n-type SiC semiconductor region has a thickness of 0.75 μm-100 μm.

8. The semiconductor device of claim 1 , wherein the one or more discrete raised regions of p-type SiC semiconductor material and the continuous raised region of p-type SiC semiconductor material each have a thickness of 0.2-5 μm.

9. The semiconductor device of claim 1 , wherein the ohmic contact material comprises nickel.

10. The semiconductor device of claim 1 , wherein the p-type SiC semiconductor material is doped with aluminum.

11. The semiconductor device of claim 1 , wherein the n-type SiC semiconductor material is doped with nitrogen.

12. The semiconductor device of claim 1 , wherein the one or more layers of dielectric material comprise an oxide layer on the SiC semiconductor substrate layer.

13. A semiconductor device made by a method comprising:

selectively etching through a layer of p-type SiC semiconductor material on a layer of n-type SiC semiconductor material on an n-type SiC semiconductor substrate layer to expose underlying n-type SiC semiconductor material in a central portion of the device; and

selectively etching through the layer of p-type semiconductor material and the layer of n-type SiC semiconductor material to expose underlying n-type SiC semiconductor substrate layer in a peripheral portion of the device;

thereby forming a mesa structure comprising a raised region of n-type SiC semiconductor material on the substrate layer having sidewalls and an upper surface and one or more discrete raised regions of p-type SiC semiconductor material on a central portion of the upper surface of the n-type SiC semiconductor material circumscribed by a continuous raised region of p-type SiC semiconductor material on a peripheral portion of the upper surface of the n-type SiC semiconductor material;

thermally oxidizing the device to form an oxide layer on unetched surfaces of p-type SiC semiconductor material and on etched surfaces of the device including the sidewalls of the raised region of n-type semiconductor material and on the exposed semiconductor substrate material;

forming one or more layers of dielectric material on the oxide layer;

selectively etching through the oxide layer and the one or more layers of dielectric material over the discrete raised p-type regions and over the continuous raised region to expose underlying p-type SiC semiconductor material;

selectively etching through the oxide layer and the one or more layers of dielectric material over the exposed n-type SiC semiconductor material to expose underlying n-type SiC semiconductor material in the central portion of the device;

forming ohmic contacts on exposed p-type SiC semiconductor material of the discrete raised p-type regions and on exposed p-type SiC semiconductor material of the continuous raised region of p-type semiconductor material;

depositing Schottky metal on the ohmic contacts and on the exposed n-type SiC semiconductor material.

14. The semiconductor device of claim 13 , wherein the method further comprises:

depositing an ohmic contact on the semiconductor substrate layer opposite the layer of n-type semiconductor material; and

forming a metal layer on the ohmic contact on the semiconductor substrate layer.