MOSFET package

1. A semiconductor device comprising:

a semiconductor substrate with a MOSFET;

a first electrode of said MOSFET formed on a first principal plane of said semiconductor substrate;

a second electrode of said MOSFET formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a first conductive member positioned over said second electrode, said first conductive member being electrically connected with said second electrode; and

a second conductive member positioned under said first principal plane of semiconductor substrate, said second conductive member being electrically connected with said first electrode,

wherein said first conductive member contains a first part, a pair of second parts and a pair of third parts,

said first part is positioned above said second principal plane of said semiconductor substrate,

said semiconductor substrate is positioned between said pair of second parts and between said pair of third parts,

each of said third parts is positioned below said first part, and

each of said third parts is connected via a respective one of said second parts to said first part.

2. A semiconductor device according to claim 1 , wherein said semiconductor device is a surface mounted device.

3. A semiconductor device according to claim 1 , wherein a bottom surface of each of said third parts of said first conductive member is adapted for a solder connection.

4. A semiconductor device according to claim 1 , wherein said first and second electrodes are a drain electrode and a source electrode of said MOSFET, respectively.

5. A semiconductor device according to claim 4 , wherein a gate electrode of said MOSFET is formed on said second principal plane of said semiconductor substrate.

6. A semiconductor device according to claim 5 , wherein said semiconductor device is a surface mounted device.

7. A semiconductor device comprising:

a semiconductor substrate with a vertical power MOS transistor;

a first electrode of the transistor formed on a first principal plane of said semiconductor substrate;

a second electrode of the transistor formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a first conductive member positioned over said second electrode, said first conductive member being electrically connected with said second electrode; and

a second conductive member positioned under said first principal plane of semiconductor substrate, said second conductive member being electrically connected with said first electrode,

wherein said first conductive member contains a first part, a pair of second parts and a pair of third parts,

said first part is positioned above said second principal plane of said semiconductor substrate,

said semiconductor substrate is positioned between said pair of second parts and between said pair of third parts,

each of said third parts is positioned below said first part,

each of said third parts is connected via a respective one of said second parts to said first part, and

a bottom surface of each of said third parts of said first conductive member is adapted for connection to a base substrate and that said first principal plane of said semiconductor substrate is enabled for facing in a direction towards the base substrate.

8. A semiconductor device according to claim 7 , wherein said first and second electrodes are a drain electrode and a source electrode of the transistor, respectively.

9. A semiconductor device according to claim 8 , wherein a gate electrode of the transistor is formed on said second principal plane of said semiconductor substrate.

10. A semiconductor device according to claim 9 , wherein said base substrate is a wiring substrate.

11. A semiconductor device according to claim 7 , wherein a gate electrode of the transistor is formed on said second principal plane of said semiconductor substrate.

12. A semiconductor device according to claim 7 , wherein said base substrate is a wiring substrate.

13. A semiconductor device comprising:

a semiconductor substrate with a power transistor;

a first electrode of the transistor formed on a first principal plane of said semiconductor substrate;

a second electrode of the transistor formed on said first principal plane of said semiconductor substrate;

a third electrode of the transistor formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane; and

a conductive member positioned over said third electrode, said conductive member being electrically connected with said third electrode,

wherein said conductive member contains a first part, a second part and a third part,

said first pad is positioned above said second principal plane of said semiconductor substrate,

said second part is positioned below said first part,

said third part is positioned below said first part and said second parts,

said third part is connected via said second part to said first part,

said first electrode and said second electrode are adapted for connection to a wiring substrate, and

a bottom surface of said third part of said conductive member is adapted for connection to said wiring substrate and that said first principal plane of said semiconductor substrate is enabled for facing in a direction towards said wiring substrate.

14. A semiconductor device according to claim 13 , wherein said first electrode is a main current terminal and said second electrode is a control terminal of the transistor.

15. A semiconductor device comprising:

a semiconductor substrate with a MOSFET;

a first electrode of said MOSFET formed on a first principal plane of said semiconductor substrate;

a second electrode of said MOSFET formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a conductive member positioned over said second electrode, said conductive member being electrically connected with said second electrode; and

wherein said conductive member contains a first part, a pair of second parts and a pair of third parts, said first part is positioned above said second principal plane of said semiconductor substrate, said semiconductor substrate is positioned between said pair of second parts and between said pair of third parts, each of said third parts is positioned below said first part and each of said third parts is connected via a respective one of said second parts to said first part, and

wherein said first electrode is adapted for electrical connection to a base substrate, the electrical connection of said first electrode to the base substrate is provided within a plan view area of the first principal plane of said semiconductor substrate.

16. A semiconductor device according to claim 15 , wherein said semiconductor device is a surface mounted device.

17. A semiconductor device according to claim 15 , wherein a bottom surface of each of said third parts of said conductive member is adapted for a solder connection.

18. A semiconductor device according to claim 15 , wherein said first and second electrodes are a drain electrode and a source electrode of said MOSFET, respectively.

19. A semiconductor device according to claim 18 , wherein a gate electrode of said MOSFET is formed on said second principal plane of said semiconductor substrate.

20. A semiconductor device according to claim 19 , wherein said base substrate is a wiring substrate.

21. A semiconductor device comprising:

a semiconductor substrate with a vertical power MOS transistor;

a first electrode of the transistor formed on a first principal plane of said semiconductor substrate;

a second electrode of the transistor formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a conductive member positioned over said second electrode, said conductive member being electrically connected with said second electrode; and

wherein said conductive member contains a first part, a pair second parts and a pair of third parts, said first part is positioned above said second principal plane of said semiconductor substrate, said semiconductor substrate is positioned between said pair of second parts and between said pair of third parts, each of said third parts is positioned below said first part, each of said third parts is connected via a respective one of said second parts to said first part, and a bottom surface of each of said third parts of said first conductive member is adapted for connection to a base substrate and that said first electrode is enabled for facing in a direction towards the base substrate, and

wherein said first electrode is adapted for electrical connection to said base substrate, the electrical connection of said first electrode to said base substrate is provided within a plan view area of the first principal plane of said semiconductor substrate.

22. A semiconductor device according to claim 21 , wherein said first and second electrodes are a drain electrode and a source electrode of the transistor, respectively.

23. A semiconductor device according to claim 22 , wherein a gate electrode of the transistor is formed on said second principal plane of said semiconductor substrate.

24. A semiconductor device according to claim 23 , wherein said base substrate is a wiring substrate.

25. A semiconductor device according to claim 21 , wherein a bottom surface of each of said third parts of said conductive member is adapted for a solder connection.

26. A semiconductor device according to claim 21 , wherein said semiconductor device is a surface mounted device.

27. A semiconductor device comprising:

a semiconductor substrate with a power transistor;

a first electrode of the transistor formed on a first principal plane of said semiconductor substrate;

a second electrode of the transistor formed on said first principal plane of said semiconductor substrate;

a third electrode of the transistor formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a conductive member positioned over said third electrode, said conductive member being electrically connected with said third electrode; and

wherein said conductive member contains a first part, a second part and a third part, said first part is positioned above said second principal plane of said semiconductor substrate, said second part is positioned below said first part, said third part is positioned below said first part and said second part, said third part is connected via said second part to said first part, a bottom surface of said third part of said conductive member is adapted for connection to a base substrate and that said first and second electrodes are enabled for facing in a direction towards said base substrate, and

wherein said first electrode and said second electrode are adapted for connection to said base substrate, the connection being provided within a plan view are of the first principal plane of said semiconductor substrate.

28. A semiconductor device according to claim 27 , wherein said First electrode is a main current terminal and said second electrode is a control terminal of the transistor.

29. A semiconductor device according to claim 27 , wherein said semiconductor device is a surface mounted device.

30. A semiconductor device for mounting on a base substrate, comprising:

a semiconductor substrate with a MOSFET;

a first electrode of said MOSFET formed on a first principal plane of said semiconductor substrate;

a second electrode of said MOSFET formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a conductive member positioned over said second electrode, said conductive member being electrically connected with said second electrode and

wherein said conductive member contains a first part, a pair of second parts and a pair of third parts, said first part is positioned above said second principal plane of said semiconductor substrate, said semiconductor substrate is positioned between said pair of second parts and between said pair of third parts, each of said third parts is positioned below said first part and each of said third parts is connected via a respective one of said second parts to said first part, and

wherein said first electrode is adapted for electrical connection to said base substrate, the electrical connection of said first electrode to said base substrate is provided within a plan view area of the first principal plane of said semiconductor substrate.

31. A semiconductor device according to claim 30 , wherein said semiconductor device is a surface mounted device.

32. A semiconductor device according to claim 30 , wherein a bottom surface of each of said third parts of said first conductive member is adapted for a solder connection.

33. A semiconductor device according to claim 30 , wherein said first and second electrodes are a drain electrode and a source electrode of said MOSFET, respectively.

34. A semiconductor device according to claim 33 , wherein a gate electrode of said MOSFET is formed on said second principal plane of said semiconductor substrate.

35. A semiconductor device according to claim 34 , wherein said base substrate is a wiring substrate.

36. A semiconductor device for mounting on a base substrate, comprising:

a semiconductor substrate with a vertical power MOS transistor;

a first electrode of the transistor formed on a first principal plane of said semiconductor substrate;

a second electrode of the transistor formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a conductive member positioned positioned over said second electrode, said conductive member being electrically connected with said second electrode; and

wherein said conductive member contains a first part, a pair of second parts and a pair of third parts, said first part is positioned above said second principal plane of said semiconductor substrate, said semiconductor substrate is positioned between said pair of second parts and between said pair of third parts, each of said third parts is positioned below said first part, each of said third parts is connected via a respective one of said second parts to said first part, and a bottom surface of each of said third parts of said first conductive member is adapted for connection to said base substrate and that said first electrode is enabled for facing in a direction towards the base substrate, and

wherein said first electrode is adapted for electrical connection to said base substrate, the electrical connection of said first electrode to said base substrate is provided within a plan view area of the first principal plane of said semiconductor substrate.

37. A semiconductor device according to claim 36 , wherein said first and second electrodes are a drain electrode and a source electrode of the transistor, respectively.

38. A semiconductor device according to claim 37 , wherein a gate electrode of the transistor is formed on said second principal plane of said semiconductor substrate.

39. A semiconductor device according to claim 38 , wherein said base substrate is a wiring substrate.

40. A semiconductor device according to claim 36 , wherein said semiconductor device is a surface mounted device.

41. A semiconductor device according to claim 36 , wherein a bottom surface of each of said third parts of said conductive member is adapted for a solder connection.

42. A semiconductor device for mounting on a base substrate, comprising:

a semiconductor substrate with a power transistor;

a first electrode of the transistor formed on a first principal plane of said semiconductor substrate;

a second electrode of the transistor formed on said first principal plane of said semiconductor substrate;

a third electrode of the transistor formed on a second principal plane of said semiconductor substrate, said second principal plane being opposite to said first principal plane;

a conductive member positioned over said third electrode, said conductive member being electrically connected with said third electrode; and

wherein said conductive member contains a first part, a second part and a third part, said first part is positioned above said second principal plane of said semiconductor substrate, said second part is positioned below said first part, said third part is positioned below said first part and said second part, said third part is connected via said second part to said first part, a bottom surface of said third part of said conductive member is adapted for connection to said base substrate and that said first and second electrodes are enabled for facing in a direction towards said wiring substrate, and

wherein said first electrode and said second electrode are adapted for connection to said base substrate, the connection being provided within a plan view area of the first principal plane of said semiconductor substrate.

43. A semiconductor device according to claim 42 , wherein said first electrode is a main current terminal and said second electrode is a control terminal of the transistor.

44. A semiconductor device according to claim 42 , wherein said base substrate is a wiring substrate.

45. A semiconductor device according to claim 42 , wherein said semiconductor device is a surface mounted device.

46. A semiconductor device for mounting on a base substrate having at least a first terminal and a second terminal, comprising:

a semiconductor chip having a first major surface, a second major surface opposite to the first major surface and side surfaces between said first and second major surfaces, said semiconductor chip including a MOSFET with a gate electrode, a source electrode and a drain electrode, one of said source and drain electrodes being disposed in said first major surface and the other one of said source and drain electrodes being disposed in said second major surface;

a conductive member containing a first part positioned above said first major surface and electrically connected to said one of said source and drain electrodes, and a second part extending from said first part and along said side surfaces of said semiconductor chip; and

wherein said second part of said conductive member is adapted for a first connection to said first terminal of said base substrate, and

wherein said other one of said source and drain electrodes is adapted for a second connection to said second terminal of said base substrate, said second connection being provided within a plan view area of said second major surface of said semiconductor chip.

47. A semiconductor device according to claim 46 , wherein said semiconductor device is a surface mounted device.

48. A semiconductor device according to claim 46 , wherein said base substrate is a wiring substrate.