Integrated circuit package system with edge connection system
An integrated circuit package system including a plurality of substrates and a plurality of semiconductor devices formed on each of the substrates. An edge connection system is provided and an electrical edge connector on each of the substrates is for attachment to the edge connection system. A vertically stacked configuration of the substrates is formed by attaching the substrates to the edge connection system.
1. A method of manufacture of an integrated circuit package system comprising:
providing a plurality of substrates;
forming a plurality of semiconductor devices on at least one of the plurality of substrates;
forming an interposer with contacts between adjacent substrates;
providing an edge connection system;
configuring an electrical edge connector on at least one of the plurality of substrates for attachment to the edge connection system; and
forming a vertically stacked configuration of the substrates by inserting the plurality of substrates into the edge connection system.
2. The method as claimed in claim 1 wherein:
forming the interposer provides mechanical stability and an electrical interconnection.
3. The method as claimed in claim 2 further comprising:
connecting at least two of the plurality of substrates using an electrical or optical ribbon cable.
4. The method as claimed in claim 1 further comprising:
testing at least one of the plurality of semiconductor devices before integration into the integrated circuit package system.
5. The method as claimed in claim 1 further comprising:
forming a heat spreader connected to the edge connection system.
6. A method of manufacture of an integrated circuit package system comprising:
providing an edge connection system;
providing a plurality of substrates including electrical edge connectors, the substrates inserted into the edge connection system;
forming a heat spreader between the plurality of substrates that require heat dissipation; and
forming a secondary support structure slidably separating the plurality of substrates or one of the plurality of substrates and the heat spreader.
7. The method as claimed in claim 6 wherein:
forming the secondary support structure includes forming integrated circuit packages, semiconductor chips, or interposers.
8. The method as claimed in claim 6 further comprising:
forming a plurality of semiconductor devices on at least one of the plurality of substrates, the plurality of semiconductor devices selected from integrated circuit packages and semiconductor chips.
9. The method as claimed in claim 8 wherein:
forming the integrated circuit packages includes forming quad-flat non-leaded packages, wire bond packages, single and dual-side memory packages, internal stacking module packages, flip-chip packages, modular packages, application-specific-integrated-circuit packages, stacked die packages or a combination thereof.
10. The method as claimed in claim 8 wherein:
forming the semiconductor chips includes forming wire bond die, flip-chip die, stacked die, modular die, application-specific-integrated-circuit die, passive devices or a combination thereof.
11. An integrated circuit package system comprising:
a plurality of substrates;
a plurality of semiconductor devices on at least one of the plurality of substrates;
an interposer with contacts between adjacent substrates;
an edge connection system;
an electrical edge connector on at least one of the plurality of substrates for attachment to the edge connection system; and
the plurality of substrates inserted within the edge connection system in a vertically stacked configuration.
12. The system as claimed in claim 11 wherein:
the interposer provides mechanical stability and an electrical interconnection.
13. The system as claimed in claim 12 further comprising:
an electrical or optical ribbon cable connecting at least two of the plurality of substrates.
14. The system as claimed in claim 11 wherein:
the plurality of semiconductor devices include tested semiconductor devices.
15. The system as claimed in claim 11 further comprising:
a heat spreader for providing an electro-magnetic interference shield for at least one of the plurality of semiconductor devices sensitive to high frequency noise.
16. The system as claimed in claim 11 further comprising:
a heat spreader; and
a secondary support structure slidably separating one of the plurality of substrates and the heat spreader.
17. The system as claimed in claim 16 wherein:
the secondary support structure includes integrated circuit packages or semiconductor chips.
18. The system as claimed in claim 11 wherein:
the plurality of semiconductor devices on at least one of the plurality of substrates are selected from integrated circuit packages and semiconductor chips.
19. The system as claimed in claim 18 wherein:
the integrated circuit packages include quad-flat non-leaded packages, wire bond packages, single and dual-side memory packages, internal stacking module packages, flip-chip packages, modular packages, application-specific-integrated-circuit packages, stacked die packages or a combination thereof.
20. The system as claimed in claim 18 wherein:
the semiconductor chips include wire bond die, flip-chip die, stacked die, modular die, application-specific-integrated-circuit die, passive devices or a combination thereof.