IP Library Patent Application 11424222
Patent Application
App. No. 11/424,222

CIRCUIT AND METHOD FOR REGULATING VOLTAGE

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Quick Facts
Patent No.
US None
App. No.
11/424,222
Abstract

A hybrid regulator circuit and a method for regulating an output voltage. The hybrid regulator circuit includes a switching regulator, a linear regulator, a selector circuit, and an output capacitor which is shared by the switching regulator and the linear regulator. The selector circuit activates the linear regulator to provide a light load current. When the load current increases to a first predetermined level, the selector circuit activates the switching regulator and the linear regulator remains activated until the switching regulator ramps up to provide a sufficient amount of current so that the regulated output voltage does not droop or sag below a desired level. The selector circuit then deactivates the linear regulator. When the load current decreases to another predetermined level, the selector circuit reactivates the linear regulator and deactivates the switching regulator.

Claims (28)

1 . A method for regulating a voltage, comprising:

activating a first regulator, wherein the first regulator provides an output current;

activating a second regulator and deactivating the first regulator when the output current increases to a first predetermined level; and

reactivating the first regulator and deactivating the second regulator when the output current decreases to a second predetermined level.

2 . The method of claim 1 , wherein the first regulator is a linear regulator and the second regulator is a switching regulator.

3 . The method of claim 1 , wherein the first and second regulators are linear regulators.

4 . The method of claim 1 , wherein the first and second regulators are switching regulators.

5 . The method of claim 1 , wherein the first regulator initially remains activated after activating the second regulator.

6 . A method for improving load transient response in a regulated output voltage, comprising:

enabling a first regulator to provide a first current level;

enabling a second regulator in response to a load current increasing to a second current level, wherein the first and second regulators cooperate to provide a summed output current; and

disabling the first regulator when the output voltage has stabilized to within a tolerance of a predetermined output voltage level, and wherein the second regulator provides the load current.

7 . The method of claim 6 , wherein the tolerance of the predetermined output voltage level is a voltage that ranges from approximately 1% to approximately 5% of the predetermined output voltage level.

8 . The method of claim 6 , wherein enabling the second regulator in response to the load current increasing to the second current level includes providing a control signal to the first regulator that maintains the first regulator in an enabled operating mode.

9 . The method of claim 6 , wherein the first regulator is a linear regulator and the second regulator is a switching regulator.

10 . The method of claim 6 , wherein the first and second regulators are linear regulators.

11 . The method of claim 6 , wherein the first and second regulators are switching regulators.

12 . The method of claim 6 , wherein the second regulator is a linear regulator.

13 . A circuit having a circuit output, comprising:

a selector circuit having first and second current sensing inputs and a voltage sensing input;

a first regulator having a regulation output and a current sensing output, the current sensing output coupled to the first current sensing input of the selector circuit; and

a second regulator having a regulation output and a current sensing output, the current sensing output coupled to the second current sensing input of the selector circuit, and wherein the regulation outputs of the first and second regulators are coupled together.

14 . The circuit of claim 13 , further including a capacitor having a first terminal coupled to the outputs of the first and second regulators and a second terminal coupled for receiving a source of operating potential.

15 . The circuit of claim 13 , wherein the first regulator is a linear regulator and the second regulator is a switching regulator.

16 . The circuit of claim 13 , wherein the first and second regulators are switching regulators.

17 . The circuit of claim 13 , wherein the first and second regulators are linear regulators.

18 . The circuit of claim 13 , wherein the first regulator further includes an input and the selector circuit further includes an output, the output of the selector circuit coupled to the input of the first regulator.

19 . The circuit of claim 13 , wherein the second regulator includes an input and the selector circuit further includes an output, the output of the selector circuit coupled to the input of the second regulator.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →
SECURITY AGREEMENT Recorded Jan 19, 2010
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 023826/0725 →
SECURITY AGREEMENT Recorded Sep 10, 2007
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 019795/0808 →
TO CORRECT RECORDATION DOCUMENT Recorded Aug 10, 2006
From: CRETELLA, DAVID JOHN; GALIPEAU, DENIS PAUL; KRAUSE, DANIEL; ZINNO, RICHARD JOHN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 018096/0448 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2006
From: CRETELLA, DAVID JOHN; GALIPEAU, DENIS PAUL; KRAUSE, DANIEL; ZINNO, RICHARD JOHN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 017854/0033 →