CCD with improved charge transfer
View Patent ↗A charge coupled device having a plurality of non-adjacent first gate electrode pairs; a plurality of second gate electrode pairs placed in every second space between the first gate electrode pairs; a plurality of third gate electrode pairs placed in the spaces between the first gate electrode pairs not occupied by the second gate electrode pairs; wherein, in a full resolution mode, the first gate electrode pairs are clocked substantially 180 degrees out of phase with respect to the second and third gate electrode pairs and the second and third gate electrode pairs are clocked substantially equally; and wherein, in a half resolution, double speed mode, the second and third gate electrode pairs are clocked substantially 180 degrees out of phase with respect to each other and substantially 50% duty cycle and the first gate electrode pairs are clocked with 25% or less duty cycle and 90 degrees out of phase with respect to the second gate electrode pairs.
1. A charge coupled device comprising:
(a) a plurality of non-adjacent, first gate electrodes;
(b) a plurality of second gate electrodes with one second gate electrode placed between every other pair of first gate electrodes;
(c) a plurality of third gate electrodes with one third gate electrode placed between remaining pairs of first gate electrodes not having a second gate electrode therebetween; and
(d) a first timing signal connected to the plurality of first gate electrodes, a second timing signal connected to the plurality of second gate electrodes, and a third timing signal connected to the plurality of third gate electrodes,
wherein, in a full resolution mode, the first gate electrodes are clocked substantially 180 degrees out of phase with respect to the second and third gate electrodes and the second and third gate electrodes are clocked substantially equally; and
wherein, in a half resolution, double speed mode, the second and third gate electrodes are clocked substantially 180 degrees out of phase with respect to each other and substantially 50% duty cycle and the first gate electrodes are clocked with 25% or less duty cycle and 90 degrees out of phase with respect to the second gate electrodes.
2. The charge coupled device of claim 1 , wherein each of the first, second, and third gate electrodes comprise two gate electrodes connected together to form a gate electrode pair.
3. A method of clocking a charge coupled device including a repeating pattern of gate electrodes, wherein the pattern of gate electrodes comprises a first gate electrode, a second sate electrode adjacent to the first gate electrode, another first gate electrode adjacent to the second gate electrode, and a third gate electrode adjacent to the other first sate electrode, the method comprising the steps of:
(a) clocking, in a full resolution mode, the first gate electrodes substantially 180 degrees out of phase with respect to the second and third gate electrodes and clocking the second and third gate electrodes substantially equally; and
(b) clocking, in a half resolution, double speed mode, the second and third gate electrodes substantially 180 degrees out of phase with respect to each other and substantially 50% duty cycle and clocking the first gate electrodes with 25% or less duty cycle and 90 degrees out of phase with respect to the second gate electrodes.
4. The method as in claim 3 wherein each of the first, second, and third gate electrodes comprise two sate electrodes connected together to form a gate electrode pair.
5. A camera comprising:
a charge coupled device comprising:
(a) a plurality of non-adjacent, first gate electrodes;
(b) a plurality of second gate electrodes with one second gate electrode placed between every other pair of first gate electrodes; and
(c) a plurality of third gate electrodes with one third gate electrode placed between remaining pairs of first gate electrodes not having a second gate electrode therebetween; and
(d) a first timing signal connected to the plurality of first gate electrodes, a second timing signal connected to the plurality of second gate electrodes, and a third timing signal connected to the plurality of third gate electrodes,
wherein, in a full resolution mode, the first gate electrodes are clocked substantially 180 degrees out of phase with respect to the second and third gate electrodes and the second and third gate electrodes are clocked substantially equally; and
wherein, in a half resolution, double speed mode, the second and third gate electrodes are clocked substantially 180 degrees out of phase with respect to each other and substantially 50% duty cycle and the first gate electrodes are clocked with 25% or less duty cycle and 90 degrees out of phase with respect to the second gate electrodes.
6. The camera as in claim 5 , wherein each of the first, second, and third gate electrodes comprise two gate electrodes.
7. The charge coupled device of claim 1 , further comprising a channel potential adjusting implant disposed partially under each first, second, and third gate electrode.
8. The camera of claim 5 , wherein the charge coupled device further includes a channel potential adjusting implant disposed partially under each first, second, and third gate electrode.