IP Library Granted Patent US 7,563,647
Granted Patent B2
US 7,563,647 · App. 11/456,532 · Granted Jul 21, 2009

Integrated circuit package system with interconnect support

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Quick Facts
Patent No.
US 7,563,647
App. No.
11/456,532
Granted
Jul 21, 2009
Kind
B2
Abstract

An integrated circuit package system with interconnect support is provided including providing an integrated circuit, forming an electrical interconnect on the integrated circuit, forming a contact pad having a chip support, and coupling the integrated circuit to the contact pad by the electrical interconnect, with the integrated circuit on the chip support.

Claims (37)

1. An integrated circuit package system with interconnect support comprising:

providing an integrated circuit;

forming an electrical interconnect on the integrated circuit;

forming a lead frame including a contact pad, a chip support, and a ring support including elevating the ring support from a bend region, including coupling the bend region to a tie bar;

coupling the integrated circuit to the contact pad by the electrical interconnect, with the integrated circuit on the chip support; and

forming the tie bar with a protuberance on the structure for leveling the integrated circuit.

2. The system as claimed in claim 1 further comprising forming an elevated paddle for supporting the integrated circuit.

3. The system as claimed in claim 1 further comprising:

forming the protuberance on the chip support; and

providing an epoxy molding compound for encapsulating the integrated circuit, the protuberance and the chip support.

4. An integrated circuit package system with interconnect support comprising:

providing an integrated circuit;

forming an electrical interconnect on the integrated circuit, includes forming solder balls, solder columns or stud bumps on the integrated circuit;

forming a lead frame including a contact pad, a chip support, with the chip support and a ring support including elevating the ring support from a bend region, including coupling the bend region to a tie bar, under the integrated circuit;

coupling the integrated circuit to the contact pad by the electrical interconnect, with the integrated circuit on the chip support, includes using a reflow process for lowering the integrated circuit onto the chip support; and

forming the tie bar with a protuberance on the structure for leveling the integrated circuit includes minimizing a contact area between the protuberance and the integrated circuit.

5. The system as claimed in claim 4 further comprising forming an elevated paddle for supporting the integrated circuit includes forming the bend region between the contact pad and the elevated paddle.

6. The system as claimed in claim 4 further comprising:

forming the protuberance on the chip support includes forming a hemisphere, a cone or a pyramid on the chip support; and

providing an epoxy molding compound for encapsulating the integrated circuit, the protuberance and the chip support, includes encapsulating the electrical interconnects.

7. An integrated circuit package system with interconnect support comprising:

an integrated circuit;

an electrical interconnect formed on the integrated circuit;

a lead frame including a contact pad, a chip support, and a ring support elevated from a bend region; including coupling the bend region to a tie bar;

the integrated circuit coupled to the contact pad by the electrical interconnect, with the integrated circuit on the chip support; and

the tie bar with a protuberance on the structure for leveling the integrated circuit.

8. The system as claimed in claim 7 further comprising an elevated paddle for supporting the integrated circuit.

9. The system as claimed in claim 7 further comprising:

the protuberance on the chip support; and

an epoxy molding compound for encapsulating the integrated circuit, the protuberance and the chip support.

10. The system as claimed in claim 7 in which the electrical interconnects include solder balls, solder columns or stud bumps.

11. The system as claimed in claim 10 further comprising an elevated paddle for supporting the integrated circuit includes the bend region between the contact pad and the elevated paddle.

12. The system as claimed in claim 10 further comprising:

the protuberance on the chip support includes a hemisphere, a cone or a pyramid on the chip support; and

an epoxy molding compound for encapsulating the integrated circuit, the protuberance and the chip support, includes the electrical interconnects encapsulated.

13. The system as claimed in claim 10 wherein the fused lead, the tie bar, or the combination thereof with the protuberance on the structure for leveling the integrated circuit includes a contact area minimized between the protuberance and the integrated circuit.

14. The system as claimed in claim 10 further comprising the ring support elevated from the bend region, the bend region coupled to the tie bar.

Assignments (5)
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC, PTE. LTE TO STATS CHIPPAC PTE. LTD (REEL: 038378 FRAME: 0319) Recorded Aug 30, 2023
From: STATS CHIPPAC PTE. LTE.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064760/0986 →
RELEASE OF SECURITY INTEREST Recorded Jun 15, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052935/0327 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0319 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2006
From: BATHAN, HENRY D.; SHIM, IL KWON; PUNZALAN, JEFFREY D.; CAMACHO, ZIGMUND RAMIREZ
To: STATS CHIPPAC LTD.
Reel/Frame 017923/0155 →